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參數(shù)資料
| 型號： | HM5212805DLTD-10 |
| 元件分類： | DRAM |
| 英文描述： | 16M X 8 SYNCHRONOUS DRAM, 8 ns, PDSO54 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 4/53頁 |
| 文件大?。?/td> | 552K |
| 代理商： | HM5212805DLTD-10 |
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HM5212165D Series, HM5212805D Series
12
Self-refresh entry [SELF]: When this command is input during the IDLE state, the SDRAM starts self-
refresh operation. After the execution of this command, self-refresh continues while CKE is Low. Since
self-refresh is performed internally and automatically, external refresh operations are unnecessary.
Power down mode entry: When this command is executed during the IDLE state, the SDRAM enters
power down mode. In power down mode, power consumption is suppressed by cutting off the initial input
circuit.
Self-refresh exit: When this command is executed during self-refresh mode, the SDRAM can exit from
self-refresh mode. After exiting from self-refresh mode, the SDRAM enters the IDLE state.
Power down exit: When this command is executed at the power down mode, the SDRAM can exit from
power down mode. After exiting from power down mode, the SDRAM enters the IDLE state.
Function Truth Table
The following table shows the operations that are performed when each command is issued in each mode of
the SDRAM. The following table assumes that CKE is high.
Current state
CS
RAS
CAS WE
Address
Command
Operation
Precharge
H
×
×××
DESL
Enter IDLE after tRP
LH
H
×
NOP
Enter IDLE after tRP
LH
H
L
×
BST
NOP
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL
L
H
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL
L
H
BA, RA
ACTV
ILLEGAL
L
H
L
BA, A10
PRE, PALL
NOP
LL
LH
×
REF, SELF
ILLEGAL
L
MODE
MRS
ILLEGAL
Idle
H
×
×××
DESL
NOP
LH
H
×
NOP
LH
H
L
×
BST
NOP
L
H
L
H
BA, CA, A10 READ/READ A
ILLEGAL
L
H
L
BA, CA, A10 WRIT/WRIT A
ILLEGAL
L
H
BA, RA
ACTV
Bank and row active
L
H
L
BA, A10
PRE, PALL
NOP
LL
LH
×
REF, SELF
Refresh
L
MODE
MRS
Mode register set
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5212805FLTD-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM |
| HM5212805FLTD-A60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
| HM5212805FLTD-B60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
| HM5212805FTD-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM |
| HM5212805FTD-A60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
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