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參數(shù)資料
| 型號(hào)： | HM5212805DLTD-10 |
| 元件分類： | DRAM |
| 英文描述： | 16M X 8 SYNCHRONOUS DRAM, 8 ns, PDSO54 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 18/53頁 |
| 文件大?。?/td> | 552K |
| 代理商： | HM5212805DLTD-10 |
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HM5212165D Series, HM5212805D Series
25
Command Intervals
Read command to Read command interval:
1. Same bank, same ROW address: When another read command is executed at the same ROW address
of the same bank as the preceding read command execution, the second read can be performed after an
interval of no less than 1 clock. Even when the first command is a burst read that is not yet finished, the
data read by the second command will be valid.
READ to READ Command Interval (same ROW address in same bank)
CLK
Command
Dout
out B3
Address
out B1 out B2
BS
ACTV
Row
Column A
READ
Column B
out A0 out B0
Bank0
Active
Column =A
Read
Column =B
Read
Column =A
Dout
Column =B
Dout
CAS Latency = 2
Burst Length = 4
Bank 0
2.
Same bank, different ROW address: When the ROW address changes on same bank, consecutive
read commands cannot be executed; it is necessary to separate the two read commands with a precharge
command and a bank-active command.
3. Different bank: When the bank changes, the second read can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. Even when the first command is a
burst read that is not yet finished, the data read by the second command will be valid.
READ to READ Command Interval (different bank)
CLK
Command
Dout
out B3
Address
out B1 out B2
BS
ACTV
Row 0
Row 1
ACTV
READ
Column A
out A0 out B0
Bank0
Active
Bank3
Active
Bank0
Read
Bank3
Read
READ
Column B
Bank0
Dout
Bank3
Dout
CAS Latency = 2
Burst Length = 4
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HM5212805FLTD-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM |
| HM5212805FLTD-A60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
| HM5212805FLTD-B60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
| HM5212805FTD-75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword × 16-bit × 4-bank/4-Mword × 8-bit × 4-bank PC/133, PC/100 SDRAM |
| HM5212805FTD-A60 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:128M LVTTL interface SDRAM 133 MHz/100 MHz 2-Mword X 16-bit X 4-bank/4-Mword X 8-bit X 4-bank PC/133, PC/100 SDRAM |
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