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140
Wait Mode and Number of Program Wait States: When 3-state access space is designated by
the AST bit, the wait mode and the number of program wait states to be inserted automatically is
selected with WMS1, WMS0, WC1, and WC0. From 0 to 3 program wait states can be selected.
Table 6.3 shows the bus specifications for each basic bus interface area.
Table 6.3
Bus Specifications for Each Area (Basic Bus Interface)
Bus Specifications (Basic Bus Interface)
ABW
AST
WMS1 WMS0 WC1
WC0
Bus Width
Access
States
Program
Wait States
0
—
Cannot be used in the H8S/2138 Series or
H8S/2134 Series.
10—
—
8
2
0
101
—
8
3
0
—*
00
3
0
11
10
2
13
Note: * Except when WMS1 = 0 and WMS0 = 1
6.3.2
Advanced Mode
The H8S/2138 and H8S/2134 have 16 address output pins, so there are no pins for output of the
upper address bits (A16 to A23) in advanced mode. H'FFF000 to H'FFFE4F can be accessed by
designating the
$6 pin as an I/O strobe pin. The accessible external space is therefore H'FFF000
to H'FFFE4F even when expanded mode with ROM enabled is selected in advanced mode.
The initial state of the external space is basic bus interface, three-state access space. In ROM-
enabled expanded mode, the space excluding the on-chip ROM, on-chip RAM, and internal I/O
registers is external space. The on-chip RAM is enabled when the RAME bit in the system
control register (SYSCR) is set to 1; when the RAME bit is cleared to 0, the on-chip RAM is
disabled and the corresponding space becomes external space.