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參數(shù)資料
| 型號(hào)： | GS9064 |
| 元件分類： | 通信、網(wǎng)絡(luò)模塊及開發(fā)工具 |
| 英文描述： | Telecomm/Datacomm |
| 中文描述： | 電信/數(shù)據(jù)通信 |
| 文件頁數(shù)： | 29/47頁 |
| 文件大小： | 754K |
| 代理商： | GS9064 |
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GENNUM CORPORATION
22208 - 0
29 of 47
G
Figure 11
FIFO_LD
Pulse Timing
3.10.2 Ancillary Data Detection and Indication
The GS9060 will detect all types of ancillary data in either
the vertical or horizontal blanking spaces and indicate via
the status signal output pins YANC and CANC the position
of ancillary data in the output data stream. These status
signal outputs are synchronous with PCLK and can be used
as clock enables to external logic, or as write enables to an
external FIFO or other memory device.
The YANC and CANC signal operation will depend on the
output data format. For 20-bit demultiplexed data, (see
Section 3.11), the YANC and CANC signals will operate
independently. However, for 10-bit multiplexed data, the
YANC and CANC signals will both be HIGH whenever
ancillary data is detected.
The signals will be HIGH from the start of the ancillary data
preamble and will remain HIGH until after the ancillary data
checksum.
The operation of the YANC and CANC signals is shown in
Figure 12.
Figure 12 YANC and CANC Output Signal Timing
3FF
3FF
000
000
000
000
XYZ
(SAV)
MULTIPLEXED
Y/Cr/Cb DATA OUT
PCLK
PCLK
LUMA DATA OUT
CHROMA DATA OUT
FIFO_LD
FIFO_LD
XYZ
(SAV)
FIFO LOAD PULSE – 10BIT OUTPUT MODE
FIFO LOAD PULSE – 20BIT OUTPUT MODE
BLANK
DID
DBN
ANC DATA
ANC DATA
ANC DATA
ANC DATA
ANC DATA
ANC DATA
ANC DATA
ANC DATA
BLANK
CSUM
CSUM
3FF
000
000
DID
3FF
DBN
DC
3FF
3FF
DC
ANC DATA
ANC DATA DETECTION – 20BIT OUTPUT MODE
ANC DATA DETECTION – 10BIT OUTPUT MODE
PCLK
MULTIPLEXED
Y/Cr/Cb DATA OUT
YANC/CANC
PCLK
LUMA DATA OUT
CHROMA DATA OUT
YANC
CANC
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