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TABLE 10 HOST INTERFACE DESCRIPTION FOR ERROR STATUS REGISTER
REGISTER
NAME
BIT
NAME
DESCRIPTION
R/W
DEFAULT
ERROR_STATUS
Address: 01h
15-11
Not Used
10
VD_STD_ERR
Video Standard Error Flag. Set HIGH when a mismatch between
the received SMPTE352M packets and the calculated video
standard occurs.
R
0
9
FF_CRC_ERR
Full Field CRC Error Flag. Set HIGH in SD mode when a Full
Field (FF) CRC mismatch has been detected in Field 1 or 2.
R
0
8
AP_CRC_ERR
Active Picture CRC Error Flag. Set HIGH in SD mode when an
Active Picture (AP) CRC mismatch has been detected in Field 1
or 2.
R
0
7
LOCK_ERR
Lock Error Flag. Set HIGH whenever the LOCK pin is LOW
(indicating the device not correctly locked).
R
0
6
Not Used
5
CS_ERR
Luma Checksum Error Flag. Set HIGH when ancillary data
packet checksum error has been detected in the Y channel.
R
0
4-2
Not Used
1
SAV_ERR
Start of Active Video Error Flag. Set HIGH when TRS errors are
detected in either 8-bit or 10-bit TRS words. FW_EN/DIS must
be set HIGH.
R
0
0
EAV_ERR
End of Active Video Error Flag. Set HIGH when TRS errors are
detected in either 8-bit or 10-bit TRS words. FW_EN/DIS must
be set HIGH.
R
0
TABLE 11 HOST INTERFACE DESCRIPTION FOR ERROR MASK REGISTER
REGISTER NAME
BIT
NAME
DESCRIPTION
R/W
DEFAULT
ERROR_MASK
Address: 1Ah
15-11
Not Used
10
VD_STD_ERR_MASK
Video Standard Error Flag Mask bit.
R/W
0
9
FF_CRC_ERR_MASK
Full Field CRC Error Flag Mask bit.
R/W
0
8
AP_CRC_ERR_MASK
Active Picture CRC Error Flag Mask bit.
R/W
0
7
LOCK_ERR_MASK
Lock Error Flag Mask bit.
R/W
0
6
Not Used
5
CS_ERR_MASK
Checksum Error Flag Mask bit.
R/W
0
4-2
Not Used
1
SAV_ERR_MASK
Start of Active Video Error Flag Mask bit.
R/W
0
0
EAV_ERR_MASK
End of Active Video Error Flag Mask bit.
R/W
0