參數(shù)資料
型號(hào)： GS9060*
英文描述： 270Mb/s Reclocking Deserializer with EDH for SDI and DVB-ASI. 3.3/1.8V supply.
中文描述： 270Mb / s的空間數(shù)據(jù)基礎(chǔ)設(shè)施和DVB硬腦膜外血腫時(shí)鐘重計(jì)解串器，意大利航天局。 3.3/1.8V供應(yīng)。
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文件大小： 754K
GENNUM CORPORATION
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3.7.4 HVF Timing Signal Generation
The GS9060 extracts critical timing parameters from either
the received TRS signals (FW_EN/DIS = LOW), or from the
internal flywheel-timing generator (FW_EN/DIS = HIGH).
Horizontal blanking period (H), vertical blanking period (V),
and even / odd field (F) timing are all extracted and
presented to the application layer via the H:V:F status
output pins.
The H signal timing is configurable via the H_CONFIG bit of
the internal IOPROC_DISABLE register as either active line
based blanking, or TRS based blanking, (see Section
3.10.6).
Active line based blanking is enabled when the H_CONFIG
bit is set LOW. In this mode, the H output is HIGH for the
entire horizontal blanking period, including the EAV and
SAV TRS words. This is the default H timing used by the
device.
When H_CONFIG is set HIGH, TRS based blanking is
enabled. In this case, the H output will be HIGH for the
entire horizontal blanking period as indicated by the H bit in
the received TRS ID words.
The timing of these signals is shown in Figure 9.
Figure 9 H, V, F Timing
H:V:F TIMING – 20-BIT OUTPUT MODE
PCLK
CHROMA DATA OUT
LUMA DATA OUT
H
000
3FF
XYZ
000
V
F
000
3FF
(XYZ
000
H:V:F TIMING – 10-BIT OUTPUT MODE
MULTIPLEXED
Y/Cr/Cb DATA OUT
PCLK
H
V
F
XYZ
000
000
3FF
XYZ
000
000
3FF
H SIGNAL TIMING:
H_CONFIG = LOW
H_CONFIG = HIGH
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相關(guān)代理商/技術(shù)參數(shù)
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GS9060-CF 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Gennum Corporation 功能描述:
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GS9062 制造商:MINDSPEED_TECH 功能描述:
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