參數(shù)資料
型號: FW323
英文描述: 1394A PCI PHY/Link Open Host Controller Interface
中文描述: 1394A端口物理層的PCI /鏈接開放主機控制器接口
文件頁數(shù): 141/152頁
文件大小: 1625K
代理商: FW323
Agere Systems Inc.
141
Data Sheet, Rev. 2
October 2001
FW323 05
1394A PCI PHY/Link Open Host Controller Interface
Timing Characteristics
Table 125. Switching Characteristics
Table 126. Clock Characteristics
ac Characteristics of Serial EEPROM Interface Signals
Table 127. ac Characteristics of Serial EEPROM Interface Signals
Symbol
Parameter
Measured
TPA, TPB
Between
TPA and TPB
10% to 90%
Test Conditions
Min
Typ
Max
0.15
±
0.1
Unit
ns
ns
Jitter, Transmit
Transmit Skew
t
r
Rise Time, Transmit (TPA/TPB)
R
I
= 56
,
C
I
= 10 pF
R
I
= 56
,
C
I
= 10 pF
1.2
ns
t
f
Fall Time, Transmit (TPA/TPB)
90% to 10%
1.2
ns
Parameter
Symbol
f
Min
Typ
Max
24.5785
Unit
MHz
External Clock Source Frequency
24.5735
24.5760
Symbol
f
ROM_CLK
t
PW_LOW
t
PW_HIGH
t
DATA_VALID
Parameter
Min
4.7
4.0
0.1
Max
100
4.5
Units
kHz
μ
s
μ
s
μ
s
Frequency of Serial Clock
Width of Serial Clock Pulse Low
Width of Serial Clock Pulse High
Time from When Serial Clock Transitions Low Until EEPROM
Returns Valid Data
Time I2C Bus Must be Idle Before a New Transaction Can be
Started
FW323 Hold Time for a Valid Start Condition
FW323 Setup Time for a Valid Start Condition
Data Out Hold Time for the FW323
Data Out Setup Time for the FW323
Rise Time for Serial Clock and Data Out from the FW323
Fall Time for Serial Clock and Data Out from the FW323
FW323 Setup Time for a Valid Stop Condition
t
HOLD_EEPROM
Data Out Hold Time for EEPROM
t
FREE
4.7
μ
s
t
HOLD_START
t
SETUP_START
t
HOLD_DATA
t
SETUP_DATA
t
RISE_TIME
t
FALL_TIME
t
SETUP_STOP
4.0
4.7
0
200
4.7
100
1.0
300
μ
s
μ
s
μ
s
ns
μ
s
ns
μ
s
ns
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