- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16508 > EVAL-ADV739XFEZ (Analog Devices Inc)BOARD EVAL FOR ADV739XFEZ PDF資料下載
參數(shù)資料
| 型號： | EVAL-ADV739XFEZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 69/108頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD EVAL FOR ADV739XFEZ |
| 標準包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻處理 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADV7403 |
| 主要屬性： | NTSC/PAL 數(shù)字視頻解碼器 |
| 次要屬性： | 前端板，用于 ADV7390、ADV7391、ADV7392 和 ADV7393 編碼器背端板 |
| 已供物品： | 板 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁當前第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
Data Sheet
ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 63 of 108
Coring Gain Border—Subaddress 0xA3, Bits[3:0]
These four bits are assigned to the gain factor applied to border
areas. In DNR mode, the range of gain values is 0 to 1 in
increments of 1/8. This factor is applied to the DNR filter
output that lies below the set threshold range. The result is then
subtracted from the original signal.
In DNR sharpness mode, the range of gain values is 0 to 0.5 in
increments of 1/16. This factor is applied to the DNR filter
output that lies above the threshold range. The result is added to
the original signal.
Coring Gain Data—Subaddress 0xA3, Bits[7:4]
These four bits are assigned to the gain factor applied to the luma
data inside the MPEG pixel block. In DNR mode, the range of
gain values is 0 to 1 in increments of 1/8. This factor is applied
to the DNR filter output that lies below the set threshold range.
The result is then subtracted from the original signal.
In DNR sharpness mode, the range of gain values is 0 to 0.5 in
increments of 1/16. This factor is applied to the DNR filter
output that lies above the threshold range. The result is added to
the original signal.
Figure 79. SD DNR Offset Control
DNR Threshold—Subaddress 0xA4, Bits[5:0]
These six bits are used to define the threshold value in the range
of 0 to 63. The range is an absolute value.
Border Area—Subaddress 0xA4, Bit 6
When this bit is set to Logic 1, the block transition area can be
defined to consist of four pixels. If this bit is set to Logic 0, the
border transition area consists of two pixels, where one pixel
refers to two clock cycles at 27 MHz.
Figure 80. SD DNR Border Area
Block Size—Subaddress 0xA4, Bit 7
This bit is used to select the size of the data blocks to be
processed. Setting the block size control function to Logic 1
defines a 16 pixel × 16 pixel data block, and Logic 0 defines an
8 pixel × 8 pixel data block, where one pixel refers to two clock
cycles at 27 MHz.
DNR Input Select—Subaddress 0xA5, Bits[2:0]
These three bits are assigned to select the filter that is applied to
the incoming Y data. The signal that lies in the pass band of the
selected filter is the signal processed by DNR. Figure 81 shows
the filter responses selectable with this control.
Figure 81. SD DNR Input Select
DNR Mode—Subaddress 0xA5, Bit 3
This bit controls the DNR mode selected. Logic 0 selects DNR
mode; Logic 1 selects DNR sharpness mode.
DNR works on the principle of defining low amplitude, high
frequency signals as probable noise and subtracting this noise
from the original signal.
In DNR mode, it is possible to subtract a fraction of the signal
that lies below the set threshold, assumed to be noise, from the
original signal. The threshold is set in DNR Register 1.
When DNR sharpness mode is enabled, it is possible to add a
fraction of the signal that lies above the set threshold to the
original signal because this data is assumed to be valid data and
not noise. The overall effect is that the signal is boosted (similar
to using the extended SSAF filter).
Block Offset Control—Subaddress 0xA5, Bits[7:4]
Four bits are assigned to this control, which allows a shift in the
data block of 15 pixels maximum. The coring gain positions are
fixed. The block offset shifts the data in steps of one pixel such
that the border coring gain factors can be applied at the same
position regardless of variations in input timing of the data.
O XXXXXXO O XXXXXXO
DNR27 TO DNR24 = 0x01
OFFSET CAUSED
BY VARIATIONS IN
INPUT TIMING
APPLY BORDER
CORING GAIN
APPLY DATA
CORING GAIN
06234-
080
720 × 485 PIXELS
(NTSC)
8 × 8 PIXEL BLOCK
TWO-PIXEL
BORDER
DATA
8 × 8 PIXEL BLOCK
06234-
081
FILTER C
FILTER B
FILTER A
FILTER D
FREQUENCY (MHz)
0
0.2
0.4
0.6
M
AG
NI
T
UDE
0.8
1.0
0
1
2
3
4
5
6
06234-
082
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IMC0402ER1N8S | INDUCTOR 1.8NH 0402 |
| RBM18DCSI | CONN EDGECARD 36POS DIP .156 SLD |
| VI-2TH-EX | CONVERTER MOD DC/DC 52V 75W |
| A3CCH-2018M | IDC CABLE - AKC20H/AE20M/AKC20H |
| IMC0402ER1N5S | INDUCTOR 1.5NH 0402 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADV7400AEBM | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer |
| EVAL-ADV7400EBM | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7400EBM-U2 | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7401EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7401EBM | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。