參數(shù)資料
型號： EVAL-ADV739XFEZ
廠商： Analog Devices Inc
文件頁數(shù)： 108/108頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADV739XFEZ
標準包裝： 1
系列： Advantiv®
主要目的： 視頻，視頻處理
嵌入式： 否
已用 IC / 零件： ADV7403
主要屬性： NTSC/PAL 數(shù)字視頻解碼器
次要屬性： 前端板，用于 ADV7390、ADV7391、ADV7392 和 ADV7393 編碼器背端板
已供物品： 板
Data Sheet
ADV7390/ADV7391/ADV7392/ADV7393
Rev. G | Page 99 of 108
ENHANCED DEFINITION
Table 98. ED Configuration Scripts
Input Format
Input Data Width
Synchronization Format
Input Color Space
Output Color Space
Table Number
525p
8-bit DDR
EAV/SAV
YCrCb
YPrPb
525p
8-bit DDR
EAV/SAV
YCrCb
RGB
525p
10-bit DDR
EAV/SAV
YCrCb
YPrPb
525p
10-bit DDR
EAV/SAV
YCrCb
RGB
525p
16-bit SDR
EAV/SAV
YCrCb
YPrPb
525p
16-bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
525p
16-bit SDR
EAV/SAV
YCrCb
RGB
525p
16-bit SDR
HSYNC/VSYNC
YCrCb
RGB
625p
8-bit DDR
EAV/SAV
YCrCb
YPrPb
625p
8-bit DDR
EAV/SAV
YCrCb
RGB
625p
10-bit DDR
EAV/SAV
YCrCb
YPrPb
625p
10-bit DDR
EAV/SAV
YCrCb
RGB
625p
16-bit SDR
EAV/SAV
YCrCb
YPrPb
625p
16-bit SDR
HSYNC/VSYNC
YCrCb
YPrPb
625p
16-bit SDR
EAV/SAV
YCrCb
RGB
625p
16-bit SDR
HSYNC/VSYNC
YCrCb
RGB
Table 99. 16-Bit 525p YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x30
0x04
525p at 59.94 Hz. EAV/SAV synchroni-
zation. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
Table 100. 16-Bit 525p YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x30
0x00
525p at 59.94 Hz. HSYNC/VSYNC synch-
ronization. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
Table 101. 16-Bit 525p YCrCb In (EAV/SAV), RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x30
0x04
525p at 59.94 Hz. EAV/SAV synchroni-
zation. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
Table 102. 16-Bit 525p YCrCb In, RGB Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x30
0x00
525p at 59.94 Hz. HSYNC/VSYNC synch-
ronization. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
Table 103. 16-Bit 625p YCrCb In (EAV/SAV), YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x30
0x1C
625p at 50 Hz. EAV/SAV synchroni-
zation. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
Table 104. 16-Bit 625p YCrCb In, YPrPb Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (8×).
0x01
0x10
ED-SDR input mode.
0x30
0x18
625p at 50 Hz. HSYNC/VSYNC synch-
ronization. EIA-770.2 output levels.
0x31
0x01
Pixel data valid.
相關(guān)PDF資料
PDF描述
IMC0402ER1N8S INDUCTOR 1.8NH 0402
RBM18DCSI CONN EDGECARD 36POS DIP .156 SLD
VI-2TH-EX CONVERTER MOD DC/DC 52V 75W
A3CCH-2018M IDC CABLE - AKC20H/AE20M/AKC20H
IMC0402ER1N5S INDUCTOR 1.5NH 0402
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EVAL-ADV7400AEBM 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer
EVAL-ADV7400EBM 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7400EBM-U2 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7401EB 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
EVAL-ADV7401EBM 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*