- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄16508 > EVAL-ADV739XFEZ (Analog Devices Inc)BOARD EVAL FOR ADV739XFEZ PDF資料下載
參數(shù)資料
| 型號(hào)： | EVAL-ADV739XFEZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 33/108頁(yè) |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADV739XFEZ |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，視頻處理 |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADV7403 |
| 主要屬性： | NTSC/PAL 數(shù)字視頻解碼器 |
| 次要屬性： | 前端板，用于 ADV7390、ADV7391、ADV7392 和 ADV7393 編碼器背端板 |
| 已供物品： | 板 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)當(dāng)前第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)
ADV7390/ADV7391/ADV7392/ADV7393
Data Sheet
Rev. G | Page 30 of 108
Table 19. Register 0x0B to Register 0x17
SR7 to
Reset
SR0
Register
Bit Description
7
6
5
4
3
2
1
0
Register Setting
Value
0x0B
DAC 1, DAC 2,
DAC 3 output
levels
Positive gain to DAC output voltage
0
0%.
0x00
0
1
+0.018%.
0
1
0
+0.036%.
…
0
1
+7.382%.
0
1
0
+7.5%.
Negative gain to DAC output voltage
1
0
7.5%.
1
0
1
7.382%.
1
0
1
0
7.364%.
…
1
0.018%.
0x0D
DAC power
mode
DAC 1 low power mode
0
DAC 1 low power
disabled.
0x00
1
DAC 1 low power enabled.
DAC 2 low power mode
0
DAC 2 low power
disabled.
1
DAC 2 low power enabled.
DAC 3 low power mode
0
DAC 3 low power
disabled.
1
DAC 3 low power enabled.
SD/ED oversample rate select
0
SD = 16×, ED = 8×.
1
SD = 8×, ED = 4×.
Reserved
0
0x10
Cable detection
DAC 1 cable detect
0
Cable detected on
DAC 1.
0x00
Read only
1
DAC 1 unconnected.
DAC 2 cable detect
0
Cable detected on
DAC 2.
Read only
1
DAC 2 unconnected.
Reserved
0
Unconnected DAC autopower-down
0
DAC autopower-down
disable.
1
DAC autopower-down
enable.
Reserved
0
0x13
Pixel Port
P[7:0] readback (ADV7390/ADV7391)
x
Read only.
0xXX
P[15:8] readback (ADV7392/ADV7393)
0x14
Pixel Port
Readback B2
P[7:0] readback (ADV7392/ADV7393)
x
Read only.
0xXX
0x16
Control port
readback2
Reserved
x
Read only.
0xXX
VSYNC readback
x
HSYNC readback
x
SFL readback
x
Reserved
x
0x17
Software reset
Reserved
0
0x00
Software reset
0
Writing a 1 resets the
device; this is a self-
clearing bit.
1
Reserved.
0
1
x = Logic 0 or Logic 1.
2
For correct operation, Subaddress 0x01[6:4] must equal the default value of 000.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IMC0402ER1N8S | INDUCTOR 1.8NH 0402 |
| RBM18DCSI | CONN EDGECARD 36POS DIP .156 SLD |
| VI-2TH-EX | CONVERTER MOD DC/DC 52V 75W |
| A3CCH-2018M | IDC CABLE - AKC20H/AE20M/AKC20H |
| IMC0402ER1N5S | INDUCTOR 1.5NH 0402 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADV7400AEBM | 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit Intergrated Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer |
| EVAL-ADV7400EBM | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7400EBM-U2 | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7401EB | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
| EVAL-ADV7401EBM | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。