Table 7. I2C-Compatible Interface Timing
參數(shù)資料
型號(hào): EVAL-ADUC832QSZ
廠商: Analog Devices Inc
文件頁數(shù): 7/92頁
文件大?。?/td> 0K
描述: KIT DEV FOR ADUC832 QUICK START
產(chǎn)品培訓(xùn)模塊: Process Control
標(biāo)準(zhǔn)包裝: 1
系列: QuickStart™ 套件
類型: MCU
適用于相關(guān)產(chǎn)品: ADuC832
所含物品: 評(píng)估板,線纜,電源,軟件和文檔
其它名稱: EVAL-ADUC832QS
EVAL-ADUC832QS-ND
Data Sheet
ADuC832
Rev. B | Page 15 of 92
Table 7. I2C-Compatible Interface Timing
Parameter1
Description
Min
Max
Unit
tL
SCLOCK low pulse width
4.7
μs
tH
SCLOCK high pulse width
4.0
μs
tSHD
Start condition hold time
0.6
μs
tDSU
Data setup time
100
μs
tDHD
Data hold time
0.9
μs
tRSU
Setup time for repeated start
0.6
μs
tPSU
Stop condition setup time
0.6
μs
tBUF
Bus free time between a stop condition and a start condition
1.3
μs
tR
Rise time of both SCLOCK and SDATA
300
ns
tF
Fall time of both SCLOCK and SDATA
300
ns
Pulse width of spike suppressed
50
ns
1
2
Input filtering on both the SCLOCK and SDATA inputs suppresses noise spikes less than 50 ns.
SDATA (I/O)
STOP
CONDITION
MSB
ACK
SCLOCK (I)
tPSU
tSHD
tDSU
tDHD
tSUP
tH
tDSU
tDHD
tRSU
tF
tR
tF
tR
tL
tBUF
START
CONDITION
tSUP
LSB
MSB
1
2–7
8
PS
9
S(R)
REPEATED
START
1
02987-
092
Figure 9. I2C Compatible Interface Timing
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