參數(shù)資料
型號： EVAL-ADUC832QSZ
廠商： Analog Devices Inc
文件頁數(shù)： 28/92頁
文件大?。?/td> 0K
描述： KIT DEV FOR ADUC832 QUICK START
產(chǎn)品培訓(xùn)模塊： Process Control
標準包裝： 1
系列： QuickStart™ 套件
類型： MCU
適用于相關(guān)產(chǎn)品： ADuC832
所含物品： 評估板，線纜，電源，軟件和文檔
其它名稱： EVAL-ADUC832QS
EVAL-ADUC832QS-ND
ADuC832
Data Sheet
Rev. B | Page 34 of 92
SPECIAL FUNCTION REGISTERS
All registers except the program counter and the four general-
purpose register banks reside in the special function register
(SFR) area. The SFR registers include control, configuration,
and data registers that provide an interface between the CPU
and other on-chip peripherals.
Figure 36 shows a full SFR memory map and SFR contents on
reset. Unoccupied SFR locations are shown dark-shaded in
Figure 36 (labeled not used). Unoccupied locations in the SFR
address space are not implemented, that is, no register exists at
that location. If an unoccupied location is read, an unspecified
value is returned. SFR locations reserved for on-chip testing are
shown lighter shaded in Figure 36 (labeled reserved) and should
not be accessed by user software. Sixteen of the SFR locations
are also bit addressable and denoted by Footnote 1 in Figure 36,
that is, the bit addressable SFRs are those whose address ends in
0H or 8H.
SPICON1
F8H
04H
F0H
00H
DAC0L
F9H
DAC0H
DAC1L
DAC1H
DACCON
FDH
04H
FCH
00H
F3H
00H
F2H
20H
FAH
00H
F1H
00H
FBH
00H
RESERVED
B1
ADCOFSL3
ADCOFSH3
ADCGAINL3
ADCGAINH3
ADCCON3
F5H
RESERVED
I2CCON 1
E8H
RESERVED
ACC1
E0H
RESERVED
ADCCON21
D8H
ADCDATAL
ADCDATAH
DAH
00H
RESERVED
PSW1
D0H
DMAL
DMAH
D2H
DMAP
00H
D3H
00H
D4H
00H
RESERVED
T2CON 1
C8H
00H
RCAP2L
CAH
00H
RCAP2H
CBH
TL2
CCH
TH2
CDH
RESERVED
WDCON 1
C0H
IP1
B8H
00H B9H
00H
ECON
EDATA1
EDATA2
BDH
IE1
IEIP2
P21
SCON 1
SBUF
I2CDAT
NOT USED
P11, 2
NOT USED
TCON 1
TMOD
TL0
TL1
TH0
TH1
P01
80H
SP
DPL
DPH
DPP
84H
00H
87H
00H
83H
00H
82H
00H
81H
07H
RESERVED
NOT USED
P31
B0H
NOT USED
SPIDAT
F7H
00H
ADCCON1
EFH
RESERVED
PSMCON
DFH
DEH
EADRL
EDATA3
EDATA4
NOT USED
PCON
IE0
89H
0
IT0
88H
0
TCON
88H 00H
MNEMONIC
SFR ADDRESS
DEFAULT VALUE
MNEMONIC
DEFAULT VALUE
SFR ADDRESS
THESE BITS ARE CONTAINED IN THIS BYTE.
SFR MAP KEY:
1SFRs WHOSE ADDRESS ENDS IN 0H OR 8H ARE BIT ADDRESSABLE.
2THE PRIMARY FUNCTION OF PORT1 IS AS AN ANALOG INPUT PORT; THEREFORE, TO ENABLE THE DIGITAL SECONDARY FUNCTIONS ON THESE
PORT PINS, WRITE A 0 TO THE CORRESPONDING PORT 1 SFR BIT.
3CALIBRATION COEFFICIENTS ARE PRECONFIGURED ON POWER-UP TO FACTORY CALIBRATED VALUES.
RESERVED
TIMECON
HTHSEC
SEC
MIN
HOUR
DPCON
PWMCON
AEH
00H
CFG832
RESERVED
T3FD
00H
PWM0L
PWM0H
PWM1L
SPH
00H
B1H
B2H
B4H
B7H
00H
C7H
00H
C6H
00H
BFH
00H
BEH
RESERVED
CHIPID
C2H
2XH
EADRH
RESERVED
PLLCON
D7H
I2CADD
ISPI
FFH
0
WCOL
FEH
0
SPE
FDH
0
SPIM
FCH
0
CPOL
FBH
0
CPHA
FAH
SPR1
F9H
0
SPR0
F8H
0
BITS
1
MDO
EFH
0 EEH
0
MCO
EDH
0 ECH
0 EBH
0 EAH
E9H
0 E8H
0
BITS
E7H
0
E6H
0 E5H
0 E4H
0 E3H
0 E2H
E1H
0 E0H
0
BITS
ADCI
DFH
0
DMA
DEH
0
CCONV
DDH
0
SCONV
DCH
0
CS3
DBH
0
CS2
DAH
CS1
D9H
0
CS0
D8H
0
BITS
CY
D7H
0
AC
D6H
0
F0
D5H
0
RS1
D4H
0
RS0
D3H
0
OV
D2H
F1
D1H
0
P
D0H
0
BITS
TF2
CFH
0
EXF2
CEH
0
RCLK
CDH
0
TCLK
CCH
0
EXEN2
CBH
0
TR2
CAH
CNT2
C9H
0
CAP2
C8H
0
BITS
PRE3
C7H
0
PRE2
C6H
0
PRE1
C5H
0
C4H
1
WDIR
C3H
0
WDS
C2H
WDE
C1H
0
WDWR
C0H
0
BITS
BFH
0
PADC
BEH
0
PT2
BDH
0
PS
BCH
0
PT1
BBH
0
PX1
BAH
PT0
B9H
0
PX0
B8H
0
BITS
RD
B7H
1
WR
B6H
1
T1
B5H
1
T0
B4H
1
INT1
B3H
1
INT0
B2H
TxD
B1H
1
RxD
B0H
1
BITS
EA
AFH
EADC
AEH
ET2
ADH
ES
ACH
ET1
ABH
EX1
AAH
ET0
A9H
EX0
A8H
0
BITS
A7H
A6H
A5H
1
A4H
1 A3H
1 A2H
A1H
1 A0H
1
BITS
SM0
9FH
0
SM1
9EH
0
SM2
9DH
0
REN
9CH
0
TB8
9BH
0
RB8
9AH
TI
99H
0
RI
98H
0
BITS
97H
1
96H
1 95H
1
94H
1 93H
1 92H
T2EX
91H
1
T2
90H
1
BITS
TF1
8FH
0
TR1
8EH
0
TF0
8DH
0
TR0
8CH
0
IE1
8BH
0
IT1
8AH
IE0
89H
0
IT0
88H
0
BITS
87H
1
86H
1 85H
1
84H
1 83H
1 82H
81H
1 80H
1
BITS
1
0
1
0
1
0
I2CM
MDE
PRE0
MDI
I2CTX
I2CI
F7H
0 F6H
0 F5H
0 F4H
0 F3H
0 F2H
F1H
0 F0H
0
BITS
0
I2CRS
T3CON
INTVAL
PWM1H
53H
00H
B3H
FFH
90H
FFH
88H
8CH
00H
8DH
9DH
9EH
00H
8BH
00H
8AH
00H
89H
00H
A0H
A4H
00H
A5H
00H
A6H
00H
A7H
00H
AFH
00H
A3H
00H
A2H
00H
A1H
00H
FFH
98H
9BH
55H
9AH
00H
99H
00H
FFH
A8H
A0H
A9H
00H
BCH
00H
10H
00H
00H D9H
00H
F4H
00H
02987-
025
Figure 36. Special Function Register Locations and Reset Values
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