參數(shù)資料
型號(hào)： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 49/132頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計(jì)資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 23 of 132
Remap Operation
When a reset occurs on the ADuC7036, execution starts
automatically in the factory-programmed internal configuration
code. This so-called kernel is hidden and cannot be accessed by
user code. If the ADuC7036 is in normal mode, it executes the
power-on configuration routine of the kernel and then jumps to
the reset vector, Address 0x00000000, to execute the reset
exception routine of the user. Because the Flash/EE is mirrored at
the bottom of the memory array at reset, the reset routine must
always be written in Flash/EE.
The remap command must be executed from the absolute
Flash/EE address and not from the mirrored, remapped
segment of memory, which may be replaced by SRAM. If a
remap operation is executed while operating code from the
mirrored location, prefetch/data aborts may occur or the user
may observe abnormal program operation.
Any kind of reset remaps the Flash/EE memory to the bottom
of the memory array.
SYSMAP0 Register
Name: SYSMAP0
Address: 0xFFFF0220
Default Value: Updated by the kernel
Access: Read/write access
Function: This 8-bit register allows user code to remap either
RAM or Flash/EE space into the bottom of the ARM memory
space, starting at Address 0x00000000.
Table 10. SYSMAP0 MMR Bit Designations
Bit
Description
7 to 1
Reserved. These bits are reserved and should be written
as 0 by user code.
0
Remap bit.
Set by the user to remap the SRAM to 0x00000000.
Cleared automatically after a reset to remap the
Flash/EE memory to 0x00000000.
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