參數(shù)資料
型號： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 27/132頁
文件大小： 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標(biāo)準(zhǔn)包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 122 of 132
Example LIN Hardware Synchronization Routine
Using the following C-source code LIN initialization routine,
LHSVAL1 begins to count on the first falling edge received on
the LIN bus. If LHSVAL1 exceeds the value written to LHSVAL1,
in this case 0x3F, a break compare interrupt is generated.
On the next falling edge, LHSVAL0 begins counting. LHSVAL0
monitors the number of falling edges and compares it to the
value written to LHSCON1[7:4]. In this example, the number of
edges to monitor is six falling edges of the LIN frame, or the five
falling edges of the sync byte. When this number of falling edges is
received, a stop condition interrupt is generated. It is at this point
that the UART is configured to receive the protected identifier.
The UART must be gated through LHSCON0[8] before the LIN
bus returns high. If the LIN bus returns high when UART is not
gated, UART communication errors may occur. This process is
shown in detail in Figure 52. Example code to ensure the success
of this process follows Figure 49.
void LIN_INIT(void )
{
char HVstatus;
GP2CON = 0x110000;
// Enable LHS on GPIO pins
LHSCON0 = 0x1;
// Reset LHS interface
do{
HVDAT = 0x02; // Enable normal LIN Tx mode
HVCON = 0x08; // Write to Config0
do{
HVstatus = HVCON;
}
while(HVstatus & 0x1); // Wait until command is finished
}
while (!(HVstatus & 0x4)); // Transmit command is correct
while((LHSSTA & 0x20) == 0 )
{
// Wait until the LHS hardware is reset
}
LHSCON1 = 0x062;
// Sets stop edge as the fifth falling edge
// and the start edge as the first falling
// edge in the sync byte
LHSCON0 = 0x0114;
// Gates UART Rx line, ensuring no interference
// from the LIN into the UART
// Selects the stop condition as a falling edge
// Enables generation of an interrupt on the
// stop condition
// Enables the interface
LHSVAL1 = 0x03F;
// Sets number of 131 kHz periods to generate a break interrupt
// 0x3F / 131 kHz ~ 480 μs, which is just over 9.5 Tbits
ID1
ID0
START
BIT
START
BIT
STOP
BIT
STOP
BIT
ID2
ID3
ID4
ID5
P0
P1
tBIT
LHSVAL1 = 0x3F
LHSVAL1
RESETS AND
STARTS
COUNTING
BREAK
COMPARE
INTERRUPT IS
GENERATED
LHSVAL0 STARTS
COUNTING
LHSVAL0 STOPS
COUNTING AND A
STOP INTERRUPT
IS GENERATED
UART IS CONFIGURED,
LHS INTERRUPTS
DISABLED EXCEPT
BREAK COMPARE
BEGINS
RECEIVING DATA
VIA UART
07
474
-04
9
Figure 52. Example LIN Configuration
while((GP2DAT & 0x10 ) == 0 )
{}
// Wait until LIN Bus returns high
LHSCON0 = 0x4;
// Enable LHS to detect Break Condition Ungate RX Line
// Disable all Interrupts except Break Compare Interrupt
IRQEN = 0x800;
// Enable UART Interrupt
// The UART is now configured and ready to be used for LIN
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