參數(shù)資料
型號： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 18/132頁
文件大小： 0K
描述： BOARD EVAL FOR ADUC7036
設計資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標準包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 114 of 132
Serial Test Interface Control Register
Name: STICON
Address: 0xFFFF0884
Default Value: 0x0000
Access: Read/write access, write protected by two key registers (STIKEY0 and STIKEY1). A write access to STICON is completed
correctly only if the following triple write sequence is followed:
1.
STIKEY0 MMR is written with 0x0007.
2.
STICON is written.
3.
The sequence is completed by writing 0x00B9 to STIKEY1.
Function: The STI Control MMR is an 16-bit register that configures the mode of operation of the serial test interface.
Note that the GPIO_13 must be configured for STI operation in GP2CON for STI communications.
Table 91. STICON MMR Bit Designations
Bit
Description
15 to 9
Reserved. These bits are reserved for future use and should be written as 0 by user code.
8 to 5
State bits, read only. If the interface is in the middle of a transmission, these bits are not 0.
4 to 2
Number of bytes to transmit. These bits select the number of bytes to be transmitted. User code must subsequently
write the bytes to be transmitted into the STIDAT0, STIDAT1, and STIDAT2 MMRs.
000 = 1-byte transmission.
001 = 2-byte transmission.
010 = 3-byte transmission.
011 = 4-byte transmission.
100 = 5-byte transmission.
101 = 6-byte transmission.
1
Reset serial test interface.
1 = resets the serial test interface. A subsequent read of STICON returns all 0s.
0 = operates in normal mode (default).
0
Serial test interface enable. This bit is set by user code.
1 = enables the serial test interface.
0 = disables the serial test interface.
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