參數(shù)資料
型號： EVAL-ADUC7036QSPZ
廠商： Analog Devices Inc
文件頁數(shù)： 19/132頁
文件大小： 0K
描述： BOARD EVAL FOR ADUC7036
設(shè)計資源： EVAL-ADUC7036 Schematic & Brd Outline
EVAL ADUC7036 Gerber Files
標準包裝： 1
系列： QuickStart™ PLUS 套件
主要目的： 電源管理，電池監(jiān)控器
嵌入式： 是，MCU，16/32 位
已用 IC / 零件： ADuC7036
已供物品： 板，線纜，文檔，仿真器，電源，軟件
ADuC7036
Rev. C | Page 115 of 132
Serial Test Interface Output Structure
The serial test interface is a high voltage output that incorporates
a low-side driver, short-circuit protection, and diagnostic pin
readback capability. The output driver circuit configuration is
shown in Figure 45.
STI PIN
READBACK
HVMON[5]
STI
TRANSMIT
GP2CON[24]
REF1
SHORT-CIRCUIT
PROTECTION CONTROL
HVCFG1[2]
STI
07
47
4-
0
42
Figure 45. STI Output Structure
Using the Serial Test Interface
Data begins transmission only when the STI port is configured
as follows:
Configure Timer4 for baud rate generation.
Correctly enable STICON using STIKEY0 and STIKEY1
for secure access.
Required bytes to be transmitted are written into
STIDAT0, STIDAT1, and STIDAT2.
Timer4 is configured with the correct load value to generate an
overflow at the required baud rate. If the STI port is being used
to transmit ADC conversion results, the baud rate must be suffi-
cient to output each ADC result (16-bits) before the next ADC
conversion result is available.
For example, if the ADC is sampling at 1 kHz, the baud rate
must be sufficient to output 36 bits as follows: (3 × 8 bits (16-bit
ADC result and a checksum byte, for example)) + (3 × 1 start
bit) + (3 × 1 parity bit) + (3 × 2 stop bits) = 36 bits.
Therefore, the serial test interface must transmit data at greater
than 36 kbps. The closest standard baud rate is 38.4 kbps; as such,
the reload value written to the Timer4 load MMR (T4LD) is
0x0106 (267 decimal). This value is based on a prescaler of 1
and is calculated as follows, using a core clock of 10.24 MHz:
267
kbps
4
.
38
MHz
24
.
10
=
Rate
Baud
Desired
Frequency
Clock
Core
T4LD
When the Timer4 load value is written and the timer itself is
configured and enabled using the T4CON MMR, the STI port
must be configured. This is accomplished by writing to the
STICON MMR in a specific sequence using the STIKEY0 and
STIKEY1 MMRs as described in the previous sections.
Finally, the STI port does not begin transmission until the required
number of transmit bytes are written into the STIDATx MMRs. As
soon as STI starts transmitting, the value in the STICON MMR
changes from the value initially written to this register. User code
can ensure that all data is transmitted by continuously polling
the STICON MMR until it reverts back to the value originally
written to it. To disable the serial interface, user code must write
a 0 to STICON[0].
Example Code
An example code segment configuring the STI port to transmit five bytes and then to transmit two bytes follows:
T4LD = 267;
// Timer4 reload value
T4CON = 0xC0;
// Enable T4, selecting core clock in periodic mode
STIKEY0 = 07;
// STICON start write sequence
STICON = 0x11;
// Enable and transmit five bytes
STIKEY1 = 0xb9;
// STICON complete write
STIDAT0 = 0xAABB;
// Five bytes for
STIDAT1 = 0xCCDD;
// transmission
STIDAT2 = 0xFF;
while(STICON != 0x09)
// Wait for transmission to complete
{}
STIKEY0 = 07;
// STICON start write sequence
STICON = 0x05;
// Enable and transmit two bytes
STIKEY1 = 0xb9;
// STICON complete write
STIDAT0 = 0xEEFF;
// Two bytes for transmission
while(STICON != 0x09)
// Wait for transmission to complete
{}
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