參數(shù)資料
型號(hào): EM6821TQ52B
英文描述: Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0&degC to 70°C; Package: 8-EPSOIC
中文描述: 微控制器
文件頁(yè)數(shù): 33/69頁(yè)
文件大?。?/td> 852K
代理商: EM6821TQ52B
EM6821
10/01, Revision A/386
Copyright
2001, EM Microelectronic-Marin SA
39
www.emmicroelectronic.com
CPU controlled Start and PA[3] controlled Stop.
In this mode setting the bit RunEn=1 while PA3/uP=0 while immediately start the counting action. Afterwards
one needs to prepare for the stop by PA[3]. Therefore the PA[3] start condition must first be fulfilled. This is in
dT
mode a rising edge on the PA3internal signal (PA3internal, refer to Figure 27). In MSC mode the start
condition is a positive pulse on PA3internal signal. The creation of this edge or pulse is done per software by
manipulating the PA3Edge selection. See Figure 29 for details. Afterwards one can change to PA3 controlled
stop mode (PA3/uP=1) where the next positive edge on PA3internal will stop the Counter. In dT mode the
RunEn/stop
bit will be cleared with the PA3 stop condition where as in MSC mode MSC mode the RunEn is
not cleared.
Pulse-width measurement of PA[3] Input Signals.
In this mode the bit dT/MSC=1 and PA3/uP=1. Setting
RunEn/stop=1 enables the operation. The first positive
edge on PA3Internal signal will start the counter, the
following negative edge will stop the counter end set bit
RunEn/Stop
to 0 . PA3internal signal is a copy of the PA[3]
terminal
status
if
PA3Edge
=1.
with
PA3Edge
=0
PA3Internal has the inverted PA[3] value. See also Figure
27 and Figure 30.
Port A PA[3] controlled Start and Stop Mode.
In this mode the bit dT/MSC=0 and PA3/uP=1. Setting
RunEn/stop=1 enables the operation. The first positive
edge on PA3Internal signal will start the counter , the
second edge will stop the counter, the third one will restart,
etc, . PA3internal signal is a copy of the PA[3] terminal
status if PA3Edge=1. With PA3Edge=0 PA3Internal has
the inverted PA[3] value. See also Figure 27 and Figure 30.
Figure 29. CPU controlled Start PA[3] controlled Stop
C ount in g
Se t
In i t ia l
V a l ues
St o p
St a r t
PA 3
St a r t
P
d T /M S C = 1 , S t o p on P A [ 3 ] Ri s i n g Ed g e
CP U W r i t e
PA3 Ed g e
PA3 / u P
R unE n/ S t op
P A 3 In te r n a l
C ount
PA [ 3 ]
Se t
In it i a l
V a lues
C ount i n g
St o p
St a r t
PA3
St a r t
P
d T /M S C = 1 , S t o p on P A [ 3 ] F a llin g Ed g e
CP U W r it e
PA 3 E d g e
P A 3/ uP
R unE n/ S t op
P A 3I nt er nal
C ount
PA [ 3 ]
C ount i n g
Se t
In i t ia l
V a l ues
St o p
St a r t
PA 3
St a r t
P
d T /M S C = 0 , S t o p on P A [ 3 ] Ri s i n g Ed g e
CP U W r i t e
PA3 Ed g e
PA3 / u P
R unE n/ S t op
P A 3 In te r n a l
C ount
PA[ 3 ]
C ount i n g
Se t
I n it ia l
V a lues
St o p
St a r t
PA3
St a r t
P
d T /M S C = 0 , S t o p on P A [ 3 ] F a llin g Ed g e
CP U W r it e
PA 3 E d g e
P A 3/ uP
R unE n/ S t op
P A 3I nt er nal
C ount
PA [ 3 ]
Figure 30. dT/MSC behavior
restart
stop
start
stop
start
Counter
RunEn
Counting
PA3 internal
Period
measurem ent
dT/MSC=0,
PA3/up=1
Pulse-width
Measurement
dT/MSC, PA3/up=1
Counter
RunEn
PA3 internal
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