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參數(shù)資料
| 型號： | EM6821TQ52B |
| 英文描述： | Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0°C to 70°C; Package: 8-EPSOIC |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 20/69頁 |
| 文件大?。?/td> | 852K |
| 代理商： | EM6821TQ52B |
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EM6821
10/01, Revision A/386
Copyright
2001, EM Microelectronic-Marin SA
27
www.emmicroelectronic.com
7. Melody, Buzzer
A normal application is to drive a buzzer connected onto the terminal Buzzer.
This peripheral cell is a combination of a 7 frequency tone generator and a 4-bit timer, used to provide a 50%
duty cycle signal on the Buzzer terminal of a pre-selected length and frequency. The Buzzer terminal is active as
long as the timer is not 0 or the SwBuzzer is set to ‘1’. The 4-bit timer can be used for another application
independent of the Buzzer terminal by selecting "silence" instead of another frequency on the Buzzer output.
"Silence" can also be used as part of a melody, or to switch off the buzzer.
To use the buzzer independent of the 4-bit timer one has to set the switch SwBuzzer. This bit is in register
RegMelTim
and selects the signal duration on the buzzer output. If SwBuzzer=1 then the signal is output until
the bit is set back to 0 . With SwBuzzer=0 the output signal duration is controlled by the 4bit timer. If neither the
SwBuzzer
or the timer are active, the Buzzer terminal is on 0.
The high impedance state setting with BzOutEn is independent of the SwBuzzer and Timer settings. As soon
as the bit is set to 1 the Buzzer terminal is set tristate. See also Figure 19.
7.1 4-Bit Timer
The timer has 2 modes:
- Single run mode (Auto=0)
- Continuos run mode (Auto=1)
Mode selection and timer count down frequency is done in register RegMelTim. All timer frequencies are
coming from the prescaler. The 4-bit timer can be used independent of the melody buzzer application.
Whenever the timer reaches 0 it generates an interrupt request IRQBz in the register RegIRQ2 . This interrupt
can be masked with the bit MaskIRQBz in register RegIRQMask2. By writing 0 into the timer period register the
timer stops immediately and does not generate an interrupt.
Figure 19. Melody Generator Block Diagram
Ck[16]
(from Prescaler)
Close
Frequency Select
SwBuzzer
Auto
BzO utEn
Zero
Frequency
Generator
4 - Bit Tim er
BZ
Term inal
8
FlBuzzer
IRQ Bz
Control & Status
Registers
Internal Data Bus DB[3:0]
Tim er Clock
(from Prescaler)
Control
Logic
Period Register
VSS
0
1
MU
X
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