參數(shù)資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數(shù): 65/178頁
文件大小: 0K
描述: KIT REF DESIGN DTMF DECODER
應用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數(shù)轉(zhuǎn)換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
Rev. 2.9
157
C8051F300/1/2/3/4/5
16.2. Capture/Compare Modules
Each module can be configured to operate independently in one of six operation modes: Edge-triggered
Capture, Software Timer, High Speed Output, Frequency Output, 8-bit Pulse Width Modulator, or 16-bit
Pulse Width Modulator. Each module has Special Function Registers (SFRs) associated with it in the CIP-
51 system controller. These registers are used to exchange data with a module and configure the module's
mode of operation.
Table 16.2 summarizes the bit settings in the PCA0CPMn registers used to select the PCA capture/com-
pare module’s operating modes. Setting the ECCFn bit in a PCA0CPMn register enables the module's
CCFn interrupt. Note: PCA0 interrupts must be globally enabled before individual CCFn interrupts are rec-
ognized. PCA0 interrupts are globally enabled by setting the EA bit and the EPCA0 bit to logic 1. See
Figure 16.3 for details on the PCA interrupt configuration.
Table 16.2. PCA0CPM Register Settings for PCA Capture/Compare Modules
PWM16
ECOM
CAPP CAPN
MAT
TOG
PWM
ECCF
Operation Mode
X*
1
0
X*
Capture triggered by positive edge
on CEXn
X*
0
1
0
X*
Capture triggered by negative
edge on CEXn
X*
1
0
X*
Capture triggered by transition on
CEXn
X*
1
0
1
0
X*
Software Timer
X*
1
0
1
0
X*
High Speed Output
X*
1
0
X*
1
X*
Frequency Output
0
1
0
X*
0
1
X*
8-bit Pulse Width Modulator
1
0
X*
0
1
X*
16-bit Pulse Width Modulator
*Note: X = Don’t Care
PCA0CN
C
F
C
R
C
F
0
C
F
2
C
F
1
PCA0MD
C
I
D
L
W
D
T
E
C
F
C
P
S
1
C
P
S
0
W
D
L
C
K
C
P
S
2
0
1
PCA Module 0
(CCF0)
PCA Module 1
(CCF1)
ECCF1
0
1
ECCF0
0
1
PCA Module 2
(CCF2)
ECCF2
PCA Counter/
Timer Overflow
0
1
PCA0CPMn
(for n = 0 to 2)
P
W
M
1
6
n
E
C
O
M
n
E
C
F
n
T
O
G
n
P
W
M
n
C
A
P
n
C
A
P
N
n
M
A
T
n
Interrupt
Priority
Decoder
EPCA0
0
1
EA
0
1
Figure 16.3. PCA Interrupt Block Diagram
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