參數資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數: 63/178頁
文件大小: 0K
描述: KIT REF DESIGN DTMF DECODER
應用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數轉換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產品目錄頁面: 627 (CN2011-ZH PDF)
相關產品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
Rev. 2.9
155
C8051F300/1/2/3/4/5
16. Programmable Counter Array
The Programmable Counter Array (PCA0) provides enhanced timer functionality while requiring less CPU
intervention than the standard 8051 counter/timers. The PCA consists of a dedicated 16-bit counter/timer
and three 16-bit capture/compare modules. Each capture/compare module has its own associated I/O line
(CEXn) which is routed through the Crossbar to Port I/O when enabled (See Section “12.1. Priority
Crossbar Decoder” on page 104 for details on configuring the Crossbar). The counter/timer is driven by
a programmable timebase that can select between six sources: system clock, system clock divided by four,
system clock divided by twelve, the external oscillator clock source divided by 8, Timer 0 overflow, or an
external clock signal on the ECI input pin. Each capture/compare module may be configured to operate
independently in one of six modes: Edge-Triggered Capture, Software Timer, High-Speed Output, Fre-
quency Output, 8-Bit PWM, or 16-Bit PWM (each mode is described in Section “16.2. Capture/Compare
Modules” on page 157). The external oscillator clock option is ideal for real-time clock (RTC) functionality,
allowing the PCA to be clocked by a precision external oscillator while the internal oscillator drives the sys-
tem clock. The PCA is configured and controlled through the system controller's Special Function Regis-
ters. The basic PCA block diagram is shown in Figure 16.1.
Important Note: The PCA Module 2 may be used as a watchdog timer (WDT), and is enabled in this mode
following a system reset. Access to certain PCA registers is restricted while WDT mode is enabled. See
Section 16.3 for details.
16-Bit Counter/Timer
CEX1
EC
I
Digital Crossbar
CEX
2
CEX
0
Port I/O
Capture/Compare
Module 1
Capture/Compare
Module 0
Capture/Compare
Module 2 / WDT
PCA
CLOCK
MUX
SYSCLK/12
SYSCLK/4
Timer 0 Overflow
ECI
SYSCLK
External Clock/8
Figure 16.1. PCA Block Diagram
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