參數(shù)資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數(shù): 25/178頁
文件大?。?/td> 0K
描述: KIT REF DESIGN DTMF DECODER
應(yīng)用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數(shù)轉(zhuǎn)換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
C8051F300/1/2/3/4/5
120
Rev. 2.9
SFR Definition 13.2.
Bit7:
MASTER: SMBus Master/Slave Indicator.
This read-only bit indicates when the SMBus is operating as a master.
0: SMBus operating in Slave Mode.
1: SMBus operating in Master Mode.
Bit6:
TXMODE: SMBus Transmit Mode Indicator.
This read-only bit indicates when the SMBus is operating as a transmitter.
0: SMBus in Receiver Mode.
1: SMBus in Transmitter Mode.
Bit5:
STA: SMBus Start Flag.
Write:
0: No Start generated.
1: When operating as a master, a START condition is transmitted if the bus is free (If the bus
is not free, the START is transmitted after a STOP is received or a free timeout is detected).
If STA is set by software as an active Master, a repeated START will be generated after the
next ACK cycle.
Read:
0: No Start or repeated Start detected.
1: Start or repeated Start detected.
Bit4:
STO: SMBus Stop Flag.
Write:
As a master, setting this bit to ‘1’ causes a STOP condition to be transmitted after the next
ACK cycle. STO is cleared to ‘0’ by hardware when the STOP is generated.
As a slave, software manages this bit when switching from Slave Receiver to Slave Trans-
mitter mode. See Section 13.5.4 for details.
Read:
0: No Stop condition detected.
1: Stop condition detected (if in Slave Mode) or pending (if in Master Mode).
Bit3:
ACKRQ: SMBus Acknowledge Request.
This read-only bit is set to logic 1 when the SMBus has received a byte and needs the ACK
bit to be written with the correct ACK response value.
Bit2:
ARBLOST: SMBus Arbitration Lost Indicator.
This read-only bit is set to logic 1 when the SMBus loses arbitration while operating as a
transmitter. A lost arbitration while a slave indicates a bus error condition.
Bit1:
ACK: SMBus Acknowledge Flag.
This bit defines the outgoing ACK level and records incoming ACK levels. It should be writ-
ten each time a byte is received (when ACKRQ=1), or read after each byte is transmitted.
0: A "not acknowledge" has been received (if in Transmitter Mode) OR will be transmitted (if
in Receiver Mode).
1: An "acknowledge" has been received (if in Transmitter Mode) OR will be transmitted (if in
Receiver Mode).
Bit0:
SI: SMBus Interrupt Flag.
This bit is set by hardware under the conditions listed in Table 13.3. SI must be cleared by
software. While SI is set, SCL is held low and the SMBus is stalled.
R
R/W
R
R/W
Reset Value
MASTER TXMODE
STA
STO
ACKRQ ARBLOST
ACK
SI
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
(bit addressable)
0xC0
SMB0CN: SMBus Control
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