參數(shù)資料
型號: DTMFDECODER-RD
廠商: Silicon Laboratories Inc
文件頁數(shù): 17/178頁
文件大?。?/td> 0K
描述: KIT REF DESIGN DTMF DECODER
應用說明: DTMF Decoder Ref Design AppNote
標準包裝: 1
主要目的: 電信,DTMF 解碼器
嵌入式:
已用 IC / 零件: C8051F300
主要屬性: 8kHz 采樣速率模數(shù)轉換器
次要屬性: 16 個 Goertzel 濾波器
已供物品: 板,軟件
產(chǎn)品目錄頁面: 627 (CN2011-ZH PDF)
相關產(chǎn)品: 336-1535-5-ND - IC 8051 MCU 8K FLASH 14-SOIC
C8051F300-GMR-ND - IC 8051 MCU 8K FLASH 11QFN
336-1245-ND - IC 8051 MCU 8K FLASH 11QFN
其它名稱: 336-1283
Rev. 2.9
113
C8051F300/1/2/3/4/5
The direction bit (R/W) occupies the least significant bit position of the address byte. The direction bit is set
to logic 1 to indicate a "READ" operation and cleared to logic 0 to indicate a "WRITE" operation.
All transactions are initiated by a master, with one or more addressed slave devices as the target.
The
master generates the START condition and then transmits the slave address and direction bit. If the trans-
action is a WRITE operation from the master to the slave, the master transmits the data a byte at a time
waiting for an ACK from the slave at the end of each byte. For READ operations, the slave transmits the
data waiting for an ACK from the master at the end of each byte. At the end of the data transfer, the master
generates a STOP condition to terminate the transaction and free the bus. Figure 13.3 illustrates a typical
SMBus transaction.
SLA6
SDA
SLA5-0
R/W
D7
D6-0
SCL
Slave Address + R/W
Data Byte
START
ACK
NACK
STOP
Figure 13.3. SMBus Transaction
13.3.1. Arbitration
A master may start a transfer only if the bus is free. The bus is free after a STOP condition or after the SCL
and SDA lines remain high for a specified time (see Section “13.3.4. SCL High (SMBus Free) Timeout”
on page 114). In the event that two or more devices attempt to begin a transfer at the same time, an arbi-
tration scheme is employed to force one master to give up the bus. The master devices continue transmit-
ting until one attempts a HIGH while the other transmits a LOW. Since the bus is open-drain, the bus will
be pulled LOW. The master attempting the HIGH will detect a LOW SDA and lose the arbitration. The win-
ning master continues its transmission without interruption; the losing master becomes a slave and
receives the rest of the transfer if addressed. This arbitration scheme is non-destructive: one device
always wins, and no data is lost.
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