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| 型號(hào)： | DS34S132GN+ |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 143/194頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TDM OVER PACKET 676-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 功能： | TDM-over-Packet（TDMoP） |
| 接口： | TDMoP |
| 電路數(shù)： | 1 |
| 電源電壓： | 1.8V, 3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 676-BGA |
| 供應(yīng)商設(shè)備封裝： | 676-PBGA（27x27） |
| 包裝： | 管件 |
| 其它名稱： | 90-34S13+2N0 |
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DS34S132 DATA SHEET
19-4750; Rev 1; 07/11
52 of 194
The Half Channel (one-way) Test requires an equivalent BERT Tester at the far end (on the left side of the
diagram). The S132 BERT Pattern Generator sends a BERT Pattern to the S132 Transmit TDM Port. The far end
uses a BERT Monitor to verify that the data is received error free. Similarly, the far end can transmit a BERT
Pattern in the opposite direction and the S132 BERT Monitor can be used to verify the received data is error free.
There is also a Packet BERT that is described in the “Packet BERT” section. The TDM BERT Engine can be
enabled at the same time as the Packet BERT. However, the two BERT Engines share several register settings, so
the TDM and Packet BERT tests do not function independent of each other. For Half Channel TDM BERT Testing
the Generator and Monitor must be programmed to match what is expected at the far end (left side of Figure 9-19).
There is no register setting to program the BERT Test Engine to “Full” or “Half” Channel Testing. The connections
that are external to the S132 determine the Full vs. Half Channel application.
The S132 TDM BERT Engine uses an Encap BERT Monitor and a Decap BERT Generator. The MD.EBCR.ERBE
enable/disables the TDM Encap BERT Monitor and MD.EBCR.ERBBS selects the TXP Bundle that is to be
monitored. Programming ERBBS with a TXP Bundle number identifies the TDM Port and Timeslots that are tested
(from the B.BCDR4.PNS and B.BCDR2.ATSS that are assigned to that TXP Bundle). The MD.DBCR.DTBE
enable/disables the TDM Decap BERT Generator and MD.DBCR.DTBBS selects the RXP Bundle that is replaced
with the generated pattern (from the B.BCDR4.PNS and B.BCDR2.ATSS that are assigned to that RXP Bundle).
The TDM BERT Engine supports 3 Test Pattern Types: Pseudo-Random Bit Sequence (PRBS), Quasi-Random Bit
Sequence (QRSS) and Repetitive Patterns. The TDM BERT Generator Test Pattern Type is programmed using
DB.BPCR.PTS and DB.BPCR.QRSS. The TDM BERT Monitor Test Pattern Type is programmed using
EB.BPCR.PTS and EB.BPCR.QRSS. For Full Channel testing these should be programmed to the same settings.
For the Pseudo-Random pattern, the “z” coefficient, “y” coefficient and Seed for the X + Xy +1 PRBS pattern is
selected for the Generator using DB.BPCR.PTF, DB.BPCR.PLF and DB.BPCR.BPS; and for the Monitor using
EB.BPCR.PTF, EB.BPCR.PLF and EB.BPCR.BPS.
For the Quasi-Random pattern the PTF, PLF and BPS registers are ignored and the X20 + X17 +1 QRBS pattern is
used. The Quasi-Random pattern is similar to a PRBS pattern but with the number of “consecutive zeros" in the
pattern limited to 14.
For the Repetitive pattern, the pattern length and pattern value are selected for the Generator using,
DB.BPCR.PLF, DB.BPCR.BPS; and for the Monitor using EB.BPCR.PLF and EB.BPCR.BPS. The EB.BPCR.PTF
and DB.BPCR.PTF settings are ignored.
The DB.BCR.TNPL is used to initiate the TDM BERT Generator with a New Test Pattern Load and TPIC is used to
enable Test Pattern Inversion.
The EB.BCR.RNPL is used to initiate the TDM BERT Monitor with a New Test Pattern Load, RPIC enables Test
Pattern Inversion, MPR enables Manual Resynchronization and APRD Disables the automatic “Pattern
Resynchronization” function (the APRD = “0” setting enables auto-resynchronization when test pattern lock is lost).
The EB.BSR, EB.BSRL, EB.BSRIE, EB.RBECR, EB.RBCR are used to Monitor the status of the TDM BERT Test
and measure the bit error performance.
The TDM BERT Generator can be programmed to insert errors in the BERT Test Pattern using the DB.TEICR
register. This can be used to demonstrate that the monitoring function (local or far end) is functioning properly.
RXP and TXP Packet functions, for Bundles that have been assigned to a TDM BERT Test, continue to function
when a BERT Test has been enabled (e.g. Clock Recovery) except that the RXP Packet payload is replaced by the
TDM BERT Test Pattern in the transmit TDM Port Timeslots. For most applications the TXP and RXP Bundles
should be disabled during a TDM BERT Test.
Special Consideration
CAS Signaling functions should be disabled for a Bundle that is used for TDM BERT Testing. In some applications
the BERT Test Pattern may be over-written with CAS Signaling.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| DS34S132GN+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34S132GNA2+ | 功能描述:通信集成電路 - 若干 32Port TDM-Over-Pack Transport Device RoHS:否 制造商:Maxim Integrated 類型:Transport Devices 封裝 / 箱體:TECSBGA-256 數(shù)據(jù)速率:100 Mbps 電源電壓-最大:1.89 V, 3.465 V 電源電壓-最小:1.71 V, 3.135 V 電源電流:50 mA, 225 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Tube |
| DS34T101 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_08 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
| DS34T101_09 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:Single/Dual/Quad/Octal TDM-over-Packet Chip |
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