參數(shù)資料
型號(hào): DS26303LN-75+A3
廠商: Maxim Integrated Products
文件頁數(shù): 81/101頁
文件大?。?/td> 0K
描述: IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
類型: 線路接口裝置(LIU)
驅(qū)動(dòng)器/接收器數(shù): 8/8
規(guī)程: T1/E1/J1
電源電壓: 3.135 V ~ 3.465 V
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 144-LQFP 裸露焊盤
包裝: 托盤
其它名稱: 90-26303+7N3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
80 of 101
10 AC CHARACTERISTICS
10.1 Line Interface Characteristics
Table 10-1. Transmitter Characteristics
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
E1 75
Ω
2.14
2.37
2.6
E1 120
Ω
2.7
3.0
3.3
T1 100
Ω
2.4
3.0
3.6
Output Mark Amplitude
V
T1 110
Ω
2.4
3.0
3.6
V
Output Zero Amplitude (Note 1)
Vs
-0.3
+0.3
V
Transmit Amplitude Variation with
Supply
-1
+1
%
Single-rail
8
Transmit Path Delay
Dual-rail
3
UI
Table 10-2. Receiver Characteristics
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Cable Attenuation
Attn
12
dB
Analog Loss-of-Signal Threshold
(Note 1)
200
mV
Analog Loss-of-Signal Threshold
Hysteresis
(Note 1)
60
mV
192
Allowable Zeros Before Loss
(Note 2)
2048
24
192
Allowable Ones Before Loss (Note 3)
192
Dual-rail
3
Receive Path Delay
Single-rail
8
UI
Note 1:
Measured at the RRINGn and RTIPn pins with an all-ones input pattern.
Note 2:
192 zeros for T1 and T1.231 specification compliance, 192 zeros for E1 and G.775 specification compliance, 2048 zeros for ETS
300 233 compliance.
Note 3:
24 ones in 192-bit period for T1.231, 192 ones for G.775, 192 ones for ETS 300 233.
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