參數(shù)資料
型號： DS26303LN-75+A3
廠商： Maxim Integrated Products
文件頁數(shù)： 67/101頁
文件大?。?/td> 0K
描述： IC LIU E1/T1/J1 3.3V 144-ELQFP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 1
類型： 線路接口裝置（LIU）
驅(qū)動器/接收器數(shù)： 8/8
規(guī)程： T1/E1/J1
電源電壓： 3.135 V ~ 3.465 V
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP 裸露焊盤
供應(yīng)商設(shè)備封裝： 144-LQFP 裸露焊盤
包裝： 托盤
其它名稱： 90-26303+7N3
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
68 of 101
6.9
BERT
The BERT is a software-programmable test-pattern generator and monitor capable of meeting most error-
performance requirements for digital transmission equipment. It generates and synchronizes to pseudorandom
patterns with a generation polynomial of the form x
n + xy + 1, where n and y can take on values from 1 to 32 and to
repetitive patterns of any length up to 32 bits.
The transmit direction generates the programmable test pattern, and inserts the test pattern payload into the data
stream.
The receive direction extracts the test pattern payload from the receive data stream, and monitors the test pattern
payload for the programmable test pattern. The features include:
Programmable PRBS pattern.
The pseudorandom bit sequence (PRBS) polynomial (x
n + xy + 1) and seed
are programmable (length n = 1 to 32, tap y = 1 to n – 1, and seed = 0 to 2
n – 1).
Programmable repetitive pattern.
The repetitive pattern length and pattern are programmable (the length n =
1 to 32 and pattern = 0 to 2
n – 1).
24-bit error count and 32-bit bit count registers
Programmable bit-error insertion.
Errors can be inserted individually, on a pin transition, or at a specific rate.
The rate 1/10
n is programmable (n = 1 to 7).
Pattern synchronization at a 10
-3 BER. Pattern synchronization is achieved even in the presence of a
random bit-error rate (BER) of 10
-3.
6.9.1
Configuration and Monitoring
Set BTCR:BERTE = 1 to enable the BERT. The following tables show how to configure the on-board BERT to send
and receive common patterns.
Table 6-10. Pseudorandom Pattern Generation
BPCR REGISTER
BERT.CR
PATTERN TYPE
PTF[4:0]
(hex)
PLF[4:0]
(hex)
PTS
QRSS
BERT.
PCR
BERT.
SPR2
BERT.
SPR1
TPIC,
RPIC
2
9-1 O.153 (511 type)
04
08
0
0x0408
0xFFFF
0
2
11-1 O.152 and O.153
(2047 type)
08
0A
0
0x080A
0xFFFF
0
2
15-1 O.151
0D
0E
0
0x0D0E
0xFFFF
1
2
20-1 O.153
10
13
0
0x1013
0xFFFF
0
2
20-1 O.151 QRSS
02
13
0
1
0x0253
0xFFFF
0
2
23-1 O.151
11
16
0
0x1116
0xFFFF
1
Table 6-11. Repetitive Pattern Generation
BPCR REGISTER
PATTERN TYPE
PTF[4:0]
(hex)
PLF[4:0]
(hex)
PTS
QRSS
BERT.
PCR
BERT.
SPR2
BERT.
SPR1
All 1s
NA
00
1
0
0x0020
0xFFFF
All 0s
NA
00
1
0
0x0020
0xFFFF
0xFFFE
Alternating 1s and 0s
NA
01
1
0
0x0021
0xFFFF
0xFFFE
Double alternating and 0s
NA
03
1
0
0x0023
0xFFFF
0xFFFC
3 in 24
NA
17
1
0
0x0037
0xFF20
0x0022
1 in 16
NA
0F
1
0
0x002F
0xFFFF
0x0001
1 in 8
NA
07
1
0
0x0027
0xFFFF
0xFF01
1 in 4
NA
03
1
0
0x0023
0xFFFF
0xFFF1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26303LN-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303LN-XXX+ 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-XXX 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
DS26303L-XXX+ 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit
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