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參數(shù)資料
| 型號： | DS26303LN-75+A3 |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 44/101頁 |
| 文件大小： | 0K |
| 描述： | IC LIU E1/T1/J1 3.3V 144-ELQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 線路接口裝置（LIU） |
| 驅(qū)動(dòng)器/接收器數(shù)： | 8/8 |
| 規(guī)程： | T1/E1/J1 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 144-LQFP 裸露焊盤 |
| 包裝： | 托盤 |
| 其它名稱： | 90-26303+7N3 |
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DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
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5.1.4
BERT Registers
Register Name:
BCR
Register Description:
BERT Control Register
Register Address:
00h
Bit #
7
6
5
4
3
2
1
0
Name
PMUM
LPMU
RNPL
RPIC
MPR
APRD
TNPL
TPIC
Default
0
Bit 7: Performance-Monitoring Update Mode (PMUM).
When 0, a performance-monitoring update is initiated by
the LPMU register bit. When 1, a performance-monitoring update is initiated by the receive performance-monitoring
update signal (RPMU). Note: If RPMU or LPMU is 1, changing the state of this bit may cause a performance-
monitoring update to occur.
Bit 6: Local Performance-Monitoring Update (LPMU).
This bit causes a performance-monitoring update to be
initiated if the local performance-monitoring update is enabled (PMUM = 0). A 0-to-1 transition causes the
performance-monitoring registers to be updated with the latest data, and the counters reset (0 or 1). For a second
performance-monitoring update to be initiated, this bit must be set to 0, and back to 1. If LPMU goes low before the
PMS bit goes high, an update might not be performed. This bit has no affect when PMUM = 1.
Bit 5: Receive New Pattern Load (RNPL).
A 0-to-1 transition of this bit causes the programmed test pattern
(QRSS, PTS, PLF[4:0], PTF[4:0], and BSP[31:0]) to be loaded in to the receive pattern generator. This bit must be
changed to 0 and back to 1 for another pattern to be loaded. Loading a new pattern forces the receive pattern
generator out of the sync state, which causes a resynchronization to be initiated. Note: QRSS, PTS, PLF[4:0],
PTF[4:0], and BSP[31:0] must not change from the time this bit transitions from 0 to 1 until four RXCK clock cycles
after this bit transitions from 0 to 1.
Bit 4: Receive Pattern Inversion Control (RPIC).
When 0, the receive incoming data stream is not altered. When
1, the receive incoming data stream is inverted.
Bit 3: Manual Pattern Resynchronization (MPR).
A 0-to-1 transition of this bit causes the receive pattern
generator to resynchronize to the incoming pattern. This bit must be changed to 0 and back to 1 for another
resynchronization to be initiated. Note: A manual resynchronization forces the receive pattern generator out of the
sync state.
Bit 2: Automatic Pattern Resynchronization Disable (APRD).
When 0, the receive pattern generator
automatically resynchronizes to the incoming pattern if six or more times during the current 64-bit window the
incoming data stream bit and the receive pattern generator output bit did not match. When 1, the receive pattern
generator does not automatically resynchronize to the incoming pattern. Note: Automatic synchronization is
prevented by not allowing the receive pattern generator to automatically exit the sync state.
Bit 1: Transmit New Pattern Load (TNPL).
A 0-to-1 transition of this bit causes the programmed test pattern
(QRSS, PTS, PLF[4:0], PTF[4:0], and BSP[31:0]) to be loaded in to the transmit pattern generator. This bit must be
changed to zero and back to one for another pattern to be loaded. Note: QRSS, PTS, PLF[4:0], PTF[4:0], and
BSP[31:0] must not change from the time this bit transitions from 0 to 1 until four TXCK clock cycles after this bit
transitions from 0 to 1.
Bit 0: Transmit Pattern Inversion Control (TPIC).
When 0, the transmit outgoing data stream is not altered.
When 1, the transmit outgoing data stream is inverted.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS26303LN-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303LN-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26303L-XXX+ | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:3.3V, E1/T1/J1, Short-Haul, Octal Line Interface Unit |
| DS26-32.768-STD-020 | 制造商:Micro Crystal Switzerland 功能描述: |
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