參數(shù)資料
型號: DS2154
廠商: Maxim Integrated Products, Inc.
英文描述: Enhanced E1 Single Chip Transceiver(改進(jìn)型E1單片收發(fā)器)
中文描述: 增強型E1單芯片收發(fā)器
文件頁數(shù): 31/71頁
文件大?。?/td> 654K
代理商: DS2154
DS2154
071498 31/71
SEC
IMR2.4
One Second Timer.
0=interrupt masked
1=interrupt enabled
TAF
IMR2.3
Transmit Align Frame.
0=interrupt masked
1=interrupt enabled
LOTC
IMR2.2
Loss Of Transmit Clock.
0=interrupt masked
1=interrupt enabled
RCMF
IMR2.1
Receive CRC4 Multifram
e.
0=interrupt masked
1=interrupt enabled
TSLIP
IMR2.0
Transmit Side Elastic Store Slip Occurrence.
0=interrupt masked
1=interrupt enabled
5.0
There are a set of four counters in the DS2154 that
record bipolar or code violations, errors in the CRC4
SMF code words, E bits as reported by the far end, and
word errors in the FAS. Each of these four counters are
automatically updated on either one second boundaries
(CCR2.7=0) or every 62.5 ms (CCR2.7=1) as deter-
mined by the timer in Status Register 2 (SR2.4). Hence,
these registers contain performance data from either
the previous second or the previous 62.5 ms. The user
can use the interrupt from the timer to determine when to
read these registers. The user has a full second (or
62.5 ms) to read the counters before the data is lost.
ERROR COUNT REGISTERS
5.1
Violation Count Register 1 (VCR1) is the most signifi-
cant word and VCR2 is the least significant word of a
BPV or Code Violation Counter
16–bit counter that records either BiPolar Violations
(BPVs) or Code Violations (CVs). If CCR2.6=0, then the
VCR counts bipolar violations. Bipolar violations are
defined as consecutive marks of the same polarity. In
this mode, if the HDB3 mode is set for the receive side
via CCR1.2, then HDB3 code words are not counted as
BPVs. If CCR2.6=1, then the VCR counts code viola-
tions as defined in ITU O.161. Code violations are
defined as consecutive bipolar violations of the same
polarity. In most applications, the DS2154 should be
programmed to count BPVs when receiving AMI code
and to count CVs when receiving HDB3 code. This
counter increments at all times and is not disabled by
loss of sync conditions. The counter saturates at 65,535
and will not rollover. The bit error rate on a E1 line would
have to be greater than 10**
–2
before the VCR would
saturate.
VCR1: UPPER BIPOLAR VIOLATION COUNT REGISTER 1
(Address=00 Hex)
VCR2: LOWER BIPOLAR VIOLATION COUNT REGISTER 2
(Address=01 Hex)
(MSB)
(LSB)
V15
V14
V13
V12
V11
V10
V9
V8
V7
V6
V5
V4
V3
V2
V1
V0
SYMBOL
POSITION
NAME AND DESCRIPTION
V15
VCR1.7
MSB of the 16–bit bipolar or code violation count .
V0
VCR2.0
LSB of the 16–bit bipolar or code violation count.
VCR1
VCR2
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