型號(hào) 廠商 描述
cat64lc10zp
2 3 4 5 6 7 8 9 10 11		 18-Mbit DDR-II SRAM 2-Word Burst Architecture
cat64lc10zpi
2 3 4 5 6 7 8 9 10 11		 18-Mbit DDR-II SRAM 2-Word Burst Architecture
cat64lc10zs
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc10zsi
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc10zsi-te13
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc10zsi-te7
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc10zs-te13
2 3 4 5 6 7 8 9 10 11		 4-Mbit (256K x 18) Flow-Through Sync SRAM
cat64lc10zs-te7
2 3 4 5 6 7 8 9 10 11		 4-Mbit (256K x 18) Pipelined Sync SRAM
cat64lc20j
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1Mbit x 18) Pipelined Register-Register Late Write
cat64lc20j-2.5
2 3 4 5 6 7 8 9 10 11		 4-Mbit (128K x 32) Pipelined Sync SRAM
cat64lc20ja
2 3 4 5 6 7 8 9 10 11		 4-Mbit (128K x 36) Flow Through Sync SRAM
cat64lc20jate13
2 3 4 5 6 7 8 9 10 11		 2-Mbit (64K x 36) Pipelined Sync SRAM
cat64lc20ji
2 3 4 5 6 7 8 9 10 11		 4-Mbit (128K x 36) Pipelined Sync SRAM
cat64lc20ji-2.5
2 3 4 5 6 7 8 9 10 11		 4-Mbit (128K x 36) Pipelined SRAM with NoBL™ Architecture
cat64lc20si-te7
2 3 4 5 6 7 8 9 10 11		 9-Mbit (256K x 36/512K x 18) Pipelined DCD Sync SRAM
cat64lc20s-te13
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc20s-te7
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture
cat64lc20uate13
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Pipelined SRAM with NoBL™ Architecture
cat64lc20uite13
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
cat64lc20urate13
2 3 4 5 6 7 8 9 10 11		 EEPROM
cat64lc20urite13
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Pipelined SRAM
cat64lc20urte13
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM
cat64lc20ute13
2 3 4 5 6 7 8 9 10 11		 EEPROM
cat64lc20zj
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM
cat64lc20zji
2 3 4 5 6 7 8 9 10 11		 18-Mbit (512K x 36/1 Mbit x 18) Pipelined DCD Sync SRAM
cat64lc20zji-te13
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc20zji-te7
2 3 4 5 6 7 8 9 10 11		 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture
cat64lc20zj-te13
2 3 4 5 6 7 8 9 10 11		 256K (32K x 8) Static RAM
cat64lc20zj-te7
2 3 4 5 6 7 8 9 10 11		 256K (32K x 8) Static RAM
cat64lc20zp
2 3 4 5 6 7 8 9 10 11		 36-Mbit QDR™-II SRAM 2-Word Burst Architecture
cat64lc40uate13
2 3 4 5 6 7 8 9 10 11		 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture
cat64lc40uite13
2 3 4 5 6 7 8 9 10 11		 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL™ Architecture
cat64lc40urate13
2 3 4 5 6 7 8 9 10 11		 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM
cat64lc40urite13
2 3 4 5 6 7 8 9 10 11		 EEPROM
cat64lc40urte13
2 3 4 5 6 7 8 9 10 11		 EEPROM
cat64lc40ute13
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
cat64lc40zj
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
cat64lc40zji
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
cat64lc40zji-te13
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
cat64lc40zji-te7
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
cat64lc40zj-te13
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR-II™ SRAM 2-Word Burst Architecture
cat64lc40zj-te7
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc40zp
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc40zs
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR™-II SRAM 4-Word Burst Architecture
cat64lc40zsi
2 3 4 5 6 7 8 9 10 11		 72-Mbit QDR™-II SRAM 2-Word Burst Architecture
cat64lc10ji
2 3 4 5 6 7 8 9 10 11		 SPI Serial EEPROM
cat64lc10ji-2.5
2 3 4 5 6 7 8 9 10 11		 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
cat64lc10ji-te13
2 3 4 5 6 7 8 9 10 11		 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
cat64lc10ji-te7
2 3 4 5 6 7 8 9 10 11		 36-Mbit QDR™-II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
cat64lc10j-te13
2 3 4 5 6 7 8 9 10 11		 36-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency)