參數(shù)資料
型號(hào)： CYP15G0402DXB
廠商： Cypress Semiconductor Corp.
英文描述： Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器)
中文描述： 二，四的HOTLink SERDES的（四的HOTLink二并行轉(zhuǎn)換器）
文件頁(yè)數(shù)： 22/29頁(yè)
文件大小： 634K
代理商： CYP15G0402DXB
CYP15G0402DXB
CYV15G0402DXB
Document #: 38-02057 Rev. *G
Page 22 of 29
CYP(V)15G0402DXB AC Characteristics
Over the
Operating Range
CYP(V)15G0402DXB Transmitter LVTTL Switching Characteristics
Over the Operating Range
Parameter
Description
Min.
19.5
6.66
2.2
2.2
0.2
0.2
1.7
0.8
19.5
6.66
–1.0
–0.5
Max.
150
51.28
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
MHz
ns
ns
ns
f
TS
t
TXCLK
t
TXCLKH [25]
t
TXCLKL [25]
t
TXCLKR [25, 26, 27]
t
TXCLKF [25, 26, 27]
t
TXDS
t
TXDH
f
TOS
t
TXCLKO
t
TXCLKOD+
t
TXCLKOD–
TXCLKx Clock Frequency
TXCLKx Period
TXCLKx HIGH Time
TXCLKx LOW Time
TXCLKx Rise Time
TXCLKx Fall Time
Transmit Data Set-up Time to
TXCLKx
↑
(TXCKSEL
≠
LOW)
Transmit Data Hold Time from TXCLKx
↑
(TXCKSEL
≠
LOW)
TXCLKO Clock Frequency = 1x or 2x REFCLK Frequency
TXCLKO Period
TXCLKO+ Duty Cycle with 60% HIGH time
TXCLKO– Duty Cycle with 40% HIGH time
1.7
1.7
150
51.28
+0.5
+1.0
CYP(V)15G0402DXB Receiver LVTTL Switching Characteristics
Over the Operating Range
Parameter
Description
Min.
9.75
6.66
2.33
[25]
5.66
2.33
[25]
5.66
–1.0
0.3
0.3
5UI – 1.5
5UI – 1.0
Max.
150
102.56
26.64
52.28
26.64
52.28
+1.0
1.2
1.2
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
f
RS
t
RXCLKP
t
RXCLKH
RXCLKx Clock Output Frequency
RXCLKx Period
RXCLKx HIGH Time (RXRATE = LOW)
RXCLKx HIGH Time (RXRATE = HIGH)
RXCLKx LOW Time (RXRATE = LOW)
RXCLKx LOW Time (RXRATE = HIGH)
RXCLKx Duty Cycle centered at 50%
RXCLKx Rise Time
RXCLKx Fall Time
Status and Data Valid Time to RXCLKx
Status and Data Valid Time to RXCLKx
(HALF RATE RECOVERED
CLOCK)
Status and Data Valid Time from RXCLKx
Status and Data Valid Time from RXCLKx
(HALF RATE
RECOVERED CLOCK)
t
RXCLKL
t
RXCLKD
t
RXCLKR [25]
t
RXCLKF [25]
t
RXDV– [28]
t
RXDV+ [28]
5UI – 1.8
5UI – 2.3
ns
ns
CYP(V)15G0402DXB REFCLK Switching Characteristics
Over the Operating Range
Parameter
Description
Min.
19.5
6.6
5.9
2.9
[25]
5.9
2.9
[25]
Max.
150
51.28
Unit
MHz
ns
ns
ns
ns
ns
f
REF
t
REFCLK
t
REFH
REFCLK Clock Frequency
REFCLK Period
REFCLK HIGH Time (TXRATE = HIGH)
REFCLK HIGH Time (TXRATE = LOW)
REFCLK LOW Time (TXRATE = HIGH)
REFCLK LOW Time (TXRATE = LOW)
t
REFL
Notes:
25. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
26. The ratio of rise time to falling time must not vary by greater than 2:1.
27. For a given operating frequency, neither rise or fall specification can be greater than 20% of the clock-cycle period or the data sheet maximum time.
28. Parallel data output specifications are only valid if all inputs or outputs are loaded with similar DC and AC loads.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0402DXB-BGC 功能描述:電信線路管理 IC Quad Channel SERDES COM RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0402DXB-BGI 制造商:Cypress Semiconductor 功能描述:
CYP15G0402DXB-BGXC 功能描述:電信線路管理 IC Quad Ch HOTLink II GbE 1XFC SERDES RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray
CYP15G0402DXB-BGXI 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLink II⑩ SERDES
CYP15G0402DX-BGC 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Quad HOTLinkII SERDES
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