參數(shù)資料
型號(hào)： CYP15G0402DX-BGI
廠商： CYPRESS SEMICONDUCTOR CORP
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Quad HOTLinkII SERDES
中文描述： SPECIALTY TELECOM CIRCUIT, PBGA256
封裝： 27 X 27 MM, 1.52 MM HEIGHT, THERMALLY ENHANCED, BGA-256
文件頁數(shù)： 22/27頁
文件大?。?/td> 852K
代理商： CYP15G0402DX-BGI
CYP15G0402DX
PRELIMINARY
Document #: 38-02023 Rev. *B
Page 22 of 27
CYP15G0402DX Receiver LVTTL Switching Characteristics
Over the Operation Range
Parameter
f
RS
t
RXCLKP
t
RXCLKH
Description
Min.
20
6.66
1.5
5
1.5
5
–
1.0
0.3
0.3
5UI
–
1.5
5UI
–
1.8
5UI
–
1.0
5UI
–
2.3
Max.
150
50
24
25
24
25
+1.0
1.2
1.2
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RXCLKx Clock Output Frequency
RXCLKx Period
RXCLKx HIGH Time (RXRATE = HIGH)
RXCLKx HIGH Time (RXRATE = LOW)
RXCLKx LOW Time (RXRATE = HIGH)
RXCLKx LOW Time (RXRATE = LOW)
RXCLKx Duty Cycle centered with a 50% HIGH Time
RXCLKx Rise Time
RXCLKx Fall Time
Status and Data Valid Time From RXCLKx (RXCKSEL HIGH or MID)
Status and Data Valid Time From RXCLKx
(RXCKSEL HIGH or MID)
Status and Data Invalid Time From RXCLKx
(half-rate clock)
Status and Data Invalid Time From RXCLKx
(half-rate clock)
CYP15G0402DXA REFCLK Switching Characteristics
Over the Operating Range
t
RXCLKL
t
RXCLKD
t
RXCLKR[20]
t
RXCLKF[20]
t
RXDV-[21]
t
RXDV+[21]
t
RXDV-[21]
t
RXDV+[21]
Parameter
f
REF
t
REFCLK
t
REFH
Description
Min.
20
6.6
5.9
2.9
5.9
2.9
30
Max.
150
100
24
35
24
35
7 0
2
2
Unit
MHz
ns
ns
ns
ns
ns
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
REFCLK Clock Output Frequency
REFCLK Period
REFCLK HIGH Time (TXRATE = HIGH)
REFCLK HIGH Time (TXRATE = LOW)
REFCLK LOW Time (TXRATE = HIGH)
REFCLK LOW Time (TXRATE = LOW)
REFCLK Duty Cycle
RXCLKx Rise Time
RXCLKx Fall Time
Transmit Data Hold Time to REFCLK (TXCKSEL = LOW)
Transmit Data Hold Time to REFCLK (TXCKSEL = LOW
Receive Data Access Time from REFCLK (RXCKSEL = LOW)
Receive Data Valid Time from REFCLK (RXCKSEL = LOW)
Receive Data Valid Time from RXCLKA (RXCKSEL = LOW)
Receive Data Valid Time from RXCLKA (RXCKSEL = LOW)
Receive Data Valid Time from RXCLKC (RXCKSEL = LOW)
Receive Data Valid Time from RXCLKC (RXCKSEL = LOW)
REFCLK Frequency Referenced to Received Clock Period
t
REFL
t
REFD
t
REF
t
REFF
t
REFDS[21]
t
REFDH[21]
t
RREFDA[21]
t
RREFDV
t
RREFDV-
t
RREFDV+
t
RREFCDV-
t
RREFCDV+
t
REFRX
Notes:
20. Tested initially and after any design or process changes that may affect these parameters, but not 100% tested.
21. Parallel data output or input specifications are only valid if all signals are loaded with similar DC and AC loads.
2
1
9.5
4.0
1.5
1.5
3.0
0.5
-0.02
+0.02
相關(guān)PDF資料
PDF描述
CYP15G0402DXB Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器)
CYV15G0402DXB Quad HOTLink II SERDES(四HOTLink II并行轉(zhuǎn)換器)
CYP15G0403DXB Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
CYV15G0403DXB Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
CYW15G0403DXB Independent Clock Quad HOTLink II Transceiver(獨(dú)立時(shí)鐘，四熱連接II收發(fā)器)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CYP15G0402DX-EVAL 功能描述:界面開發(fā)工具 Quad Ch HOTLink II GbE 1XFC SERDES RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
CYP15G0403DXB 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver Single 3.3V supply
CYP15G0403DXB_07 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II⑩ Transceiver
CYP15G0403DXB_09 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver
CYP15G0403DXB_11 制造商:CYPRESS 制造商全稱:Cypress Semiconductor 功能描述:Independent Clock Quad HOTLink II Transceiver Single 3.3V supply
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