- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378513 > CY7C954DX (Cypress Semiconductor Corp.) ATM HOTLink Transceiver(ATM 熱接插收發(fā)器) PDF資料下載
參數(shù)資料
| 型號(hào)： | CY7C954DX |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | ATM HOTLink Transceiver(ATM 熱接插收發(fā)器) |
| 中文描述： | 自動(dòng)柜員機(jī)的HOTLink收發(fā)器（自動(dòng)柜員機(jī)熱接插收發(fā)器） |
| 文件頁數(shù)： | 15/42頁 |
| 文件大?。?/td> | 484K |
| 代理商： | CY7C954DX |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
CY7C954DX
PRELIMINARY
15
and RXRVS indicate the type of information received. If the
immediately following character is a Special Character code of
any type (even a C5.0), then a 101b is posted to indicate an
illegal sequence was received.
An illegal sequence can be caused by a remote transmitter
sending incorrect information, or by the data getting corrupted
during transmission. When such an error is detected and the
101b status bits posted, the associated data field is set to the
Special Character code that was received without error (C8.0,
C9.0, or C10.0 reported as D8.0, D9.0, or D10.0 along with the
101b status). This information is provided to assist in debug-
ging link or protocol faults.
Note
: Since an error in an ATM cell causes the cell to be dis-
carded, except in Receive mode (11), these error indications
will not be visible.
The 100b indication is used to mark the associated Data char-
acter as the first character of a new Cell (SOC Marker Type I),
packet, cell, or other data construct used by the system. The
Data characters and Special Character codes that follow this
marker are written to the Receive FIFO (depending on the Re-
ceiver Discard Policy in effect; see
Table 5
).
The 110b indication is used to mark the associated Data char-
acter as the first character of a new Cell (SOC Marker Type II).
This marker is treated internally the same as the 100b Start-
Of-Cell marker, which allows it to be used to mark the bound-
ary of any user-specific information. As a boundary or cell
marker, the immediately following data can be a data field, a
header, a stream identifier, a transaction number, a packet
length indicator, or any of a number of pieces of information
connected to a data transfer.
The 111b indication is used to mark the associated Data char-
acter as the first character of a new Cell (SOC Marker Type III).
This marker is treated internally the same as the 100b and
110b Start-Of-Cell markers, which allows it to be used to mark
the boundary of any user-specific information.
The 100b, 110b and 110b, indicators can be used interchange-
ably; i.e., they can be used for Start of Cell markers, Extended
Command Markers, General Cell routing indicators, or any
number of user specified functions.
If the transmit FIFO is allowed to empty, the transmitter will fill
the unused data spaces with C5.0 (k28.5). A receiver set to
allow cells longer than 53 bytes will assume that eight consec-
utive C5.0 characters are equivalent to a
“
virtual SOC
”
and will
release the cell into the FIFO for further processing. Care
should be taken to avoid intra-cell gaps that might result in
unintentional termination of the ATM cell, because for receive
modes that discard cells less than 53 bytes, this
“
virtual SOC
”
could result in cell loss.
Receive Control State Machine
The Receive Control State Machine responds to multiple input
conditions to control the routing and handling of received char-
acters. It controls the staging of characters across various reg-
isters and the Receive FIFO. It also interprets all embedded
Special Character codes, and converts the appropriate ones
to specific bit combinations in the Receive FIFO. It controls the
various discard policies and error control within the receiver. It
operates in response to:
the received character stream
the room for additional data in the Receive FIFO
the state of the receiver BIST enable (RXBISTEN*)
the state of LOOPTX
These signals are used by the Receive Control State Machine
to control the Receive Formatter, write access to the Receive
FIFO, write access to the Elasticity Buffer, the Receive Output
register, and BIST. They determine the content of the charac-
ters passed to each of these destinations,
The Receive Control State Machine always operates synchro-
nous to the recovered character clock (bit-clock/10).
Discard Policies
The Receive Control State Machine has the ability to selective-
ly discard specific characters and cells from the data stream
that are determined by the present configuration as being un-
necessary. When discarding is enabled, it reduces the host
system overhead necessary to keep the Receive FIFO from
overflowing and losing data.
The discard policy is configured as part of the operating mode
and is set using the RXMODE[1:0] inputs. The four discard
policies are listed in
Table 5
.
Policy 0 (00b) is the most stringent and also most closely ap-
proximates the rules for an ATM data link. In this mode, every
cell is checked for a valid Header Error Check byte (transmitted
cells have the HEC calculated and inserted into the 5th byte
after the Start of Cell marker) and cell lengths are checked.
The receiver will calculate the HEC code for each ATM header
and compare it with the 5th byte of each cell. If the calculated
HEC code does not match the one that is received, the ATM
cell will be discarded.
Long cell truncation is enabled and the HOTLink will truncate
long cells to 53 bytes, discarding the remainder. The receiver
counts incoming bytes upon receipt of a Start of Cell command
code. Once 53 bytes of data are received, a new Start of Cell
is assumed. The remainder creates a short cell fragment in the
receiver which will be flushed because of HEC check, or
length.
Short cell flushing is enabled, so any ATM cells that are shorter
than 53 bytes will be discarded. The RXFIFO will begin count-
ing incoming bytes upon receipt of the Start of Cell command
Table 4. Receive Data Formatting
R
R
R
Data Format Indication
Normal data character
Reserved
Normal command character
Received C0.7 Exception character or other
character exception (as listed in
Table 9
)
Received Start of Cell Marker Type I (C8.0) +
Data Character
Received Illegal Sequence
Received Start of Cell Marker Type II (C9.0) +
Data Character
Received Start of Cell Marker Type III (C10.0)
+ Data Character
0
0
0
0
0
0
1
1
0
1
0
1
1
0
0
1
1
0
1
1
0
1
1
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY7C964A | Bus Interface Logic Circuit |
| CY7C964A-UM | Bus Interface Logic Circuit |
| CY7C964A-UMB | Bus Interface Logic Circuit |
| CY7C964A-ASC | Bus Interface Logic Circuit |
| CY7C964A-NC | Bus Interface Logic Circuit |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C955-NC | 制造商:Cypress Semiconductor 功能描述:SONET Transceiver, AX ATM-SONET/SDH Transceiver |
| CY7C960-UMB | 制造商:Cypress Semiconductor 功能描述: |
| CY7C9611-NC | 功能描述:IC PHYSICAL LAYER DEVICE RoHS:否 類別:未定義的類別 >> 其它 系列:* 標(biāo)準(zhǔn)包裝:1 系列:* 其它名稱:MS305720A |
| CY7C964A-GMB | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CY7C964AUM | 制造商: 功能描述: 制造商:CY 功能描述: 制造商:undefined 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。