參數(shù)資料
型號(hào)： CXD3220R
廠商： Sony Corporation
英文描述： IEEE1394 Link/Transaction Layer Controller LSI for SBP-2
中文描述： IEEE1394連接鏈路/事務(wù)層控制器芯片為收縮壓- 2
文件頁(yè)數(shù)： 59/65頁(yè)
文件大?。?/td> 655K
代理商： CXD3220R
– 59 –
CXD3220R
b) CXD3220R controlling
CTL [0:1]
Name
00
01
10
11
Idle
Hold
Transmit
Reserved
Description of Activity
The CXD3220R completed transmit.
The CXD3220R is holding the bus until transmit preparations are complete.
Or, the CXD3220R is trying to transmit another packet without Arbitration.
The CXD3220R is transmitting a packet to Phy.
Not used.
8-2-2. Request
The CXD3220R always uses serial communication of LREQ to send a request to Phy when a request to the
bus or access to the Phy register is required.
There are three types of request: Bus request, Read register request and Write register request. The timing
chart and contents are illustrated below.
Bit
Name
0
1 to 3
4, 5
6
Start Bit
Request Type
Request Speed
Stop Bit
Description
Transmit start bit. Always "1".
Indicates type of request. (Refer to Request Type table.)
Indicates request communication speed. (Refer to Request Speed table.)
Last transmit bit. Always "0".
LR3
LR2
LR1
LR0
LR (n – 2)
LR (n – 1)
a) Bus Request (Length of Stream: 7bit)
Bit
Name
0
1 to 3
4 to 7
8
Start Bit
Request Type
Address
Stop Bit
Description
Transmit start bit. Always "1".
Indicates type of request. (Refer to Request Type table.)
Address for Phy register read.
Last transmit bit. Always "0".
b) Read-Register Request (Length of Stream: 9bit)
Bit
Name
0
1 to 3
4 to 7
8 to 15
16
Start Bit
Request Type
Address
Data
Stop Bit
Description
Transmit start bit. Always "1".
Indicates type of request. (Refer to Request Type table.)
Address for Phy register write.
Write data for Phy register specified by Address.
Last transmit bit. Always "0".
c) Write-Register Request (Length of Stream: 17bit)
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相關(guān)代理商/技術(shù)參數(shù)
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