- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378471 > CXD3220R (Sony Corporation) IEEE1394 Link/Transaction Layer Controller LSI for SBP-2 PDF資料下載
參數(shù)資料
| 型號： | CXD3220R |
| 廠商： | Sony Corporation |
| 英文描述： | IEEE1394 Link/Transaction Layer Controller LSI for SBP-2 |
| 中文描述： | IEEE1394連接鏈路/事務(wù)層控制器芯片為收縮壓- 2 |
| 文件頁數(shù)： | 22/65頁 |
| 文件大小： | 655K |
| 代理商： | CXD3220R |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁
– 22 –
CXD3220R
14) ADP Status Registers
These registers are used for reading the ADP Status value.
The register address is 38h and the initial value is 0000_0000h.
This register is for read only.
Bit
Name
15 to 12
11 to 8
7 to 4
3 to 0
err
rcode
ack-i
ack-o
Function
This indicates the error code (see below) of the ADP.
The Interrupt ADPErr bit rises when an error has occurred.
This indicates the response code of a response packet that has returned to
the ADP from the initiator. "1111" is written in the case of a Write Transaction
that has become a unified Transaction.
Writes the Ack code for the request packet.
Writes the Ack code transmitted by the ADP for the response packet.
These registers are cleared when a ADPgo bit has been set. After a ADPgo bit has been set and the ADP has
started, the following occurs in the case any type of error occurs in the request packet or response packet.
1) Generation of a request packet is stopped.
2) The rcode and Ack are latched, and stored in the ADP Status register.
3) An interrupt is generated.
This register is cleared when ADPreset = 1.
<List of Error Codes>
err value
0 (all clear)
1
2
3
4
5
6
7
8
meaning
no error
error ack code received (for request packet)
error ack code sent (for response packet)
split transaction time-out
busy_timeout
bus reset occurred
bad rcode received
receive response packet
from a node other than the specified node
bad tCode received
(bad tCode is 2 [d = 0], 6/7 [d = 1])
(When two or more error codes occur at the same time, the code with the lower code value is displayed.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD3300R | 10-bit 20MSPS Video A/D Converter |
| CXD3406GA | Silver Mica Capacitor; Capacitance:30000pF; Capacitance Tolerance:+/- 2%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| CXD3408 | Timing Generator and Signal Processor for Frame Readout CCD Image Sensor |
| CXD3408GA | Silver Mica Capacitor; Capacitance:30000pF; Capacitance Tolerance:+/- 5%; Series:CD42; Voltage Rating:500VDC; Capacitor Dielectric Material:Mica; Termination:Radial Leaded; Lead Pitch:27mm; Leaded Process Compatible:Yes RoHS Compliant: Yes |
| CXD3412 | Timing Generator and Signal Processor for Frame Readout CCD Image Sensor |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD3300R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:10-bit 20MSPS Video A/D Converter |
| CXD3400 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:6-channel CCD Vertical Clock Driver |
| CXD3400N | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:6-channel CCD Vertical Clock Driver |
| CXD3406GA | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor |
| CXD3408 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:Timing Generator and Signal Processor for Frame Readout CCD Image Sensor |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。