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| 型號： | BX80528KL150GD |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA603 |
| 封裝： | PGA-603 |
| 文件頁數(shù)： | 116/116頁 |
| 文件大?。?/td> | 2277K |
| 代理商： | BX80528KL150GD |
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Intel XeonTM Processor MP
Datasheet
99
7.4.3
PIR and Scratch EEPROM Supported SMBus Transactions
The Processor Information ROM (PIR) responds to two SMBus packet types: Read Byte and Write
Byte. However, since the PIR is write-protected, it will acknowledge a Write Byte command but
ignore the data. The Scratch EEPROM responds to Read Byte and Write Byte commands. Table 37
diagrams the Read Byte command. Table 38 diagrams the Write Byte command. Following a write
cycle to the scratch ROM, software must allow a minimum of 10ms before accessing either ROM
of the processor.
In the tables, ‘S’ represents the SMBus start bit, ‘P’ represents a stop bit, ‘R’ represents a read bit,
‘W’ represents a write bit, ‘A’ represents an acknowledge (ACK), and ‘///’ represents a negative
acknowledge (NACK). The shaded bits are transmitted by the Processor Information ROM or
Scratch EEPROM, and the bits that aren’t shaded are transmitted by the SMBus host controller. In
the tables the data addresses indicate 8 bits. The SMBus host controller should transmit 8 bits with
the most significant bit indicating which section of the EEPROM is to be addressed: the Processor
Information ROM (MSB = 0) or the Scratch EEPROM (MSB = 1).
7.4.4
SMBus Thermal Sensor
The processor’s SMBus thermal sensor provides a means of acquiring thermal data from the
processor. The thermal sensor is composed of control logic, SMBus interface logic, a precision
analog-to-digital converter, and a precision current source. The sensor drives a small current
through the p-n junction of a thermal diode located on the processor core. The forward bias voltage
generated across the thermal diode is sensed and the precision A/D converter derives a single byte
of thermal reference data, or a “thermal byte reading.” The nominal precision of the least
significant bit of a thermal byte is 1° Celsius.
The processor incorporates the SMBus thermal sensor and thermal reference byte onto the
processor package as was done with the previous Intel Pentium III XeonTM processor family.
Upper and lower thermal reference thresholds can be individually programmed for the SMBus
thermal sensor. Comparator circuits sample the register where the single byte of thermal data
(thermal byte reading) is stored. These circuits compare the single byte result against
programmable threshold bytes. If enabled, the alert signal on the processor SMBus (SM_ALERT#)
will be asserted when the sensor detects that either threshold is reached or crossed. Analysis of
SMBus thermal sensor data may be useful in detecting changes in the system environment that may
require attention.
During manufacturing, the thermal reference byte programmed it into the Processor Information
ROM. The thermal reference byte represent the approximate maximum temperate of the processor
and is determined through device characterization.
Table 37. Read Byte SMBus Packet
S
Slave
Address
Write
A
Command
Code
AS
Slave
Address
Read
A
Data
///
P
17-bits
1
18-bits
11
7-bits
1
8-bits
1
Table 38. Write Byte SMBus Packet
S
Slave
Address
Write
A
Command Code
A
Data
AP
17-bits
1
18-bits
11
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