參數(shù)資料
型號： BX80528KL150GD
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 1500 MHz, MICROPROCESSOR, CPGA603
封裝： PGA-603
文件頁數(shù)： 102/116頁
文件大?。?/td> 2277K
代理商： BX80528KL150GD
Intel XeonTM Processor MP
86
Datasheet
THERMTRIP#
O
Activation of THERMTRIP# (Thermal Trip) indicates the processor junction temperature
has reached a level beyond which permanent silicon damage may occur. Measurement of
the temperature is accomplished through an internal thermal sensor which is configured to
trip at approximately 135
° C. To properly protect the processor, power must be removed
upon THERMTRIP# becoming active. See Figure 13 and Table 16 for the appropriate
power down sequence and timing requirement. In parallel, the processor will attempt to
reduce its temperature by shutting off internal clocks and stopping all program execution.
Once activated, THERMTRIP# remains latched and the processor will be stopped until
RESET# is asserted. A RESET# pulse will reset the processor and execution will begin at
the boot vector. If the temperature has not dropped below the trip level, the processor will
assert THERMTRIP# and return to the shutdown state. The processor releases
THERMTRIP# when RESET# is activated even if the processor is still too hot.
TMS
I
TMS (Test Mode Select) is a JTAG specification support signal used by debug tools.
TRDY#
I
TRDY# (Target Ready) is asserted by the target to indicate that it is ready to receive a write
or implicit writeback data transfer. TRDY# must connect the appropriate pins of all system
bus agents.
TRST#
I
TRST# (Test Reset) resets the Test Access Port (TAP) logic. TRST# must be driven low
during power on Reset. This can be done with a 680
pull-down resistor. For platforms that
implement the debug port interface, refer to the ITP700 Debug Port Design Guidelines for
specific termination instructions for the TAP signals.
VCCA
I
VCCA provides isolated power for the analog portion of the internal PLL’s. Use a discrete
RLC filter to provide clean power. Use the filter defined in Section 2.4.1 to provide clean
power to the PLL. The tolerance and total ESR for the filter is important. Refer to the
appropriate platform design guidelines for complete implementation details.
VCCIOPLL
I
VCCIOPLL provides isolated power for digital portion of the internal PLL’s. Follow the
guidelines for VCCA (Section 2.4.1), and refer to the appropriate platform design guidelines
for complete implementation details.
VCCSENSE
VSSSENSE
O
The VCCSENSE and VSSSENSE pins are the points for which processor minimum and
maximum voltage requirements are specified. Uni processor designs may utilize these pins
for voltage sensing for the processor’s voltage regulator. However, multiprocessor designs
must not connect these pins to sense logic, but rather utilize them for power delivery
validation.
VID[4:0]
O
VID[4:0] (Voltage ID) pins can be used to support automatic selection of power supply
voltages (VCC). These pins are not signals, but are either an open circuit or a short circuit to
VSS on the processor. The combination of opens and shorts defines the voltage required by
the processor. The VID pins are needed to cleanly support processor voltage specification
variations. See Table 3 for definitions of these pins. The power supply must supply the
voltage that is requested by these pins, or disable itself.
VSSA
I
VSSA provides an isolated, internal ground for internal PLL’s. Do not connect directly to
ground. This pin is to be connected to VCCA and VCCIOPLL through a discrete filter circuit.
Table 33. Signal Definitions (Page 8 of 8)
Name
Type
Description
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