參數(shù)資料
型號(hào): AT32AP7002-CTUT
廠商: Atmel
文件頁(yè)數(shù): 78/83頁(yè)
文件大小: 0K
描述: IC MCU 32BIT AVR32 196-CBGA
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
標(biāo)準(zhǔn)包裝: 945
系列: AVR®32 AP7
核心處理器: AVR
芯體尺寸: 32-位
速度: 150MHz
連通性: EBI/EMI,I²C,MMC,PS2,SPI,SSC,UART/USART,USB
外圍設(shè)備: AC'97,DMA,I²S,LCD,POR,PWM,WDT
輸入/輸出數(shù): 85
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: D/A 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 196-CBGA
包裝: 托盤
配用: ATAVRONEKIT-ND - KIT AVR/AVR32 DEBUGGER/PROGRMMR
ATNGW100-ND - KIT AVR32 NETWORK GATEWAY
ATSTK1000-ND - KIT STARTER FOR AVR32AP7000
2011 Microchip Technology Inc.
DS70118J-page 71
dsPIC30F2010
12.0
OUTPUT COMPARE MODULE
This section describes the Output Compare module
and associated operational modes. The features pro-
vided by this module are useful in applications requiring
operational modes such as:
Generation of Variable Width Output Pulses
Power Factor Correction
Figure 12-1 depicts a block diagram of the Output
Compare module.
The key operational features of the Output Compare
module include:
Timer2 and Timer3 Selection mode
Simple Output Compare Match mode
Dual Output Compare Match mode
Simple PWM mode
Output Compare during Sleep and Idle modes
Interrupt on Output Compare/PWM Event
These operating modes are determined by setting
the appropriate bits in the 16-bit OCxCON SFR (where
x = 1 and 2).
OCxRS and OCxR in the figure represent the Dual
Compare registers. In the Dual Compare mode, the
OCxR register is used for the first compare and OCxRS
is used for the second compare.
FIGURE 12-1:
OUTPUT COMPARE MODE BLOCK DIAGRAM
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
“dsPIC30F Family Reference Manual”
(DS70046).
OCxR
Comparator
Output
Logic
Q
S
R
OCM<2:0>
Output Enable
OCx
Set Flag bit
OCxIF
OCxRS
Mode Select
3
Note:
Where ‘x’ is shown, reference is made to the registers associated with the respective Output Compare
channels 1and 2.
OCFA
OCTSEL
0
1
T2P2_MATCH
TMR2<15:0>
TMR3<15:0>
T3P3_MATCH
From General Purpose
(for x = 1 and 2)
0
1
Timer Module
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