參數(shù)資料
型號: AMD ATHLON
廠商: Advanced Micro Devices, Inc.
英文描述: 32-Bit Microprocessor with 3D Multimedia Performance and Digital Video(32位微處理器帶3D多媒體性能和數(shù)字視頻)
中文描述: 32三維多媒體性能和數(shù)字視頻比特微處理器(32位微處理器帶三維多媒體性能和數(shù)字視頻)
文件頁數(shù): 99/106頁
文件大?。?/td> 1740K
代理商: AMD ATHLON
21016G/0
December 1999
AMD Athlon
Processor Data Sheet
Preliminary Information
Appendix A
Conventions, Abbreviations, and References
85
Appendix A
Conventions, Abbreviations,
and References
This section contains information about the conventions and
abbreviations used in this document and a list of related
publications.
Signals and Bits
n
Active-Low Signals
Signal names containing a pound sign,
such as SFILL#, indicate active-Low signals. They are
asserted in their Low-voltage state and negated in their
High-voltage state. When used in this context, High and
Low are written with an initial upper case letter.
Signal Ranges
In a range of signals, the highest and lowest
signal numbers are contained in brackets and separated by
a colon (for example, D[63:0]).
Reserved Bits and Signals
Signals or bus bits marked
reserved
must be driven inactive or left unconnected, as
indicated in the signal descriptions. These bits and signals
are reserved by AMD for future implementations. When
software reads registers with reserved bits, the reserved bits
must be masked. When software writes such registers, it
must first read the register and change only the
non-reserved bits before writing back to the register.
Three-State
In timing diagrams, signal ranges that are
high impedance are shown as a straight horizontal line
half-way between the high and low levels.
n
n
n
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