參數(shù)資料
型號: AMD ATHLON
廠商: Advanced Micro Devices, Inc.
英文描述: 32-Bit Microprocessor with 3D Multimedia Performance and Digital Video(32位微處理器帶3D多媒體性能和數(shù)字視頻)
中文描述: 32三維多媒體性能和數(shù)字視頻比特微處理器(32位微處理器帶三維多媒體性能和數(shù)字視頻)
文件頁數(shù): 46/106頁
文件大小: 1740K
代理商: AMD ATHLON
32
Electrical Data
Chapter 6
AMD Athlon
Processor Data Sheet
21016G/0
December 1999
Preliminary Information
6.11
AC Characteristics
The AC characteristics of the AMD Athlon processor are shown
in Table 13. The parameters are grouped based on the source or
destination of the signals involved. All parameters are defined
at the card edge of the AMD Athlon processor module.
Table 13. AC Characteristics
Group
Symbol
T
RISE
T
FALL
T
SKEW-
SAMEEDGE
T
SKEW-
DIFFEDGE
T
SU
T
HD
T
VAL
T
SU
T
HD
Parameter
Min
1
Max
3
Units
V/ns
Notes
1
All Signals
Output Rise Slew Rate
Output Fall Slew Rate
Output skew with respect to
the same clock edge
Output skew with respect to a
different clock edge
Input Data Setup Time
1
3
V/ns
1
C
385
ps
2
770
ps
2
300
ps
3
Input Data Hold Time
300
ps
3
S
RstClk to Output Valid
250
2000
ps
5
Setup to RstClk
500
ps
6
Hold from RstClk
1000
ps
6
Notes:
Test Circuit used
See Figure 8 on page 33.
1. Rise and fall time ranges are guidelines over which the I/O has been characterized.
2. T
is the maximum skew within a clock forwarded group between any two signals or between any signal
and its forward clock, as measured at the package, with respect to the same clock edge.
T
K7-SKEW-DIFFEDGE
is the maximum skew within a clock forwarded group between any two signals or between any signal
and its forward clock, as measured at the package, with respect to different clock edges.
3. Input SU and HD times are with respect to the appropriate Clock Forward Group input clock.
4. The synchronous signals include
PROCRDY, CONNECT, CLKFWDRST.
5. T
VAL
is RstClk rising edge to output valid for PROCRDY. Test Load
25pf.
6. T
is setup of CONNECT/CLKFWDRST to rising edge of RSTCLK. T
HD
is hold of CONNECT/CLKFWDRST from rising edge
of RSTCLK.
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