
ADV7188
SD_SAT_Cr[7:0] SD Saturation Cr Channel, Address 0xE4 [7:0]
This register allows the user to control the gain of the Cr
channel only. The user can adjust the saturation of the picture.
Table 30. SD_SAT_Cr Function
SD_SAT_Cr[7:0]
Description
0x80 (default)
Gain on Cr channel = 1
0x00
Gain on Cr channel = 0
0xFF
Gain on Cr channel = 2
SD_OFF_Cb[7:0] SD Offset Cb Channel, Address 0xE1 [7:0]
This register allows the user to select an offset for data on the
Cb channel only and adjust the hue of the picture. There is a
functional overlap with the HUE[7:0] register.
Table 31. SD_OFF_Cb Function
SD_OFF_Cb[7:0]
Description
0x80 (default)
0 offset applied to the Cb channel.
0x00
568 mV offset applied to the Cb channel.
0xFF
+568 mV offset applied to the Cb channel.
SD_OFF_Cr [7:0] SD Offset Cr Channel, Address 0xE2 [7:0]
This register allows the user to select an offset for data on the Cr
channel only and adjust the hue of the picture. There is a func-
tional overlap with the HUE[7:0] register.
Table 32. SD_OFF_Cr Function
SD_OFF_Cr[7:0]
Description
0x80 (default)
0 offset applied to the Cr channel.
0x00
568 mV offset applied to the Cr channel.
0xFF
+568 mV offset applied to the Cr channel.
BRI[7:0] Brightness Adjust, Address 0x0A [7:0]
This register controls the brightness of the video signal. It
allows the user to adjust the brightness of the picture.
Table 33. BRI Function
BRI[7:0]
Description
0x00 (default)
Offset of the luma channel = 0mV
0x7F
Offset of the luma channel = +204mV
0x80
Offset of the luma channel = 204mV
HUE[7:0] Hue Adjust, Address 0x0B [7:0]
This register contains the value for the color hue adjustment. It
allows the user to adjust the hue of the picture.
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HUE[7:0] has a range of ±90°, with 0x00 equivalent to an
adjustment of 0°. The resolution of HUE[7:0] is 1 bit = 0.7°.
The hue adjustment value is fed into the AM color demodulation
block. Therefore, it only applies to video signals that contain
chroma information in the form of an AM modulated carrier
(CVBS or Y/C in PAL or NTSC). It does not affect SECAM and
does not work on component video inputs (YPrPb).
Table 34. HUE Function
HUE[7:0]
0x00 (default)
0x7F
0x80
DEF_Y[5:0] Default Value Y, Address 0x0C [7:2]
If the ADV7188 loses lock on the incoming video signal or if
there is no input signal, the DEF_Y[5:0] bits allow the user to
specify a default luma value to be output. The register is used
under the following conditions:
Description
Phase of the chroma signal = 0°.
Phase of the chroma signal = +90°.
Phase of the chroma signal = 90°.
If DEF_VAL_AUTO_EN bit is set to high and the
ADV7188 loses lock to the input video signal. This is the
intended mode of operation (automatic mode).
The DEF_VAL_EN bit is set, regardless of the lock status of
the video decoder. This is a forced mode that may be useful
during configuration.
The DEF_Y[5:0] values define the 6 MSBs of the output video.
The remaining LSBs are padded with 0s. For example, in 10-bit
mode, the output is Y[9:0] = {DEF_Y[5:0], 0, 0, 0, 0}.
The value for Y is set by the DEF_Y[5:0] bits. A value of 0x0D
produces a blue color in conjunction with the DEF_C[7:0]
default setting.
Register 0x0C has a default value of 0x36.
DEF_C[7:0] Default Value C, Address 0x0D [7:0]
The DEF_C[7:0] register complements the DEF_Y[5:0] value.
It defines the 4 MSBs of Cr and Cb values to be output if
The DEF_VAL_AUTO_EN bit is set to high and the
ADV7188 can’t lock to the input video (automatic mode).
DEF_VAL_EN bit is set to high (forced output).
The data that is finally output from the ADV7188 for the
chroma side is Cr[7:0] = {DEF_C[7:4], 0, 0, 0, 0}, Cb[7:0] =
{DEF_C[3:0], 0, 0, 0, 0}.
In full 10-bit output mode, two extra LSBs of value 00 are
appended.
The values for Cr and Cb are set by the DEF_C[7:0] bits. A
value of 0x7C produces a blue color in conjunction with the
DEF_Y[5:0] default setting.