
ADV7188
GLOBAL STATUS REGISTERS
Three registers provide summary information about the video
decoder. The STATUS_1, STATUS_2, and STATUS_3 registers
contain status bits that report operational information to the user.
Rev. 0 | Page 21 of 112
STATUS_1[7:0] Address 0x10 [7:0]
This read only register provides information about the internal
status of the ADV7188. See CIL[2:0] Count Into Lock, Address
0x51 [2:0] and COL[2:0] Count Out of Lock, Address 0x51 [5:3]
for information on the timing.
Depending on the setting of the FSCLE bit, the STATUS_1[0]
and STATUS_1[1] bits are based solely on horizontal timing
information or on the horizontal timing and lock status of the
color subcarrier. See the FSCLE Fsc Lock Enable, Address 0x51
[7] section.
STATUS_2[7:0], Address 0x12 [7:0]
See Table 22.
STATUS_3[7:0], Address 0x13 [7:0]
See Table 23.
AD_RESULT[2:0] Autodetection Result Address 0x10 [6:4]
These bits report back on the findings from the autodetection
block. For more information on enabling the autodetection
block, see the General Setup section. For information on
configuring it, see the Autodetection of SD Modes section.
Table 20. AD_RESULT Function
AD_RESULT[2:0]
000
001
010
011
100
101
110
111
Description
NTSM-MJ
NTSC-443
PAL-M
PAL-60
PAL-BGHID
SECAM
PAL-Combination N
SECAM 525
Table 21. STATUS_1 Function
STATUS 1 [7:0]
0
1
2
3
4
5
6
7
Bit Name
IN_LOCK
LOST_LOCK
FSC_LOCK
FOLLOW_PW
AD_RESULT.0
AD_RESULT.1
AD_RESULT.2
COL_KILL
Description
In lock (right now).
Lost lock (since last read of this register).
Fsc locked (right now).
AGC follows peak white algorithm.
Result of autodetection.
Result of autodetection.
Result of autodetection.
Color kill active.
Table 22. STATUS_2 Function
STATUS 2 [7:0]
0
1
2
3
4
5
6
7
Bit Name
MVCS DET
MVCS T3
MV_PS DET
MV_AGC DET
LL_NSTD
FSC_NSTD
Reserved
Reserved
Description
Detected Macrovision color striping.
Macrovision color striping protection. Conforms to Type 3 if high, and to Type 2 if low.
Detected Macrovision pseudo Sync pulses.
Detected Macrovision AGC pulses.
Line length is nonstandard.
Fsc frequency is nonstandard.
Table 23. STATUS_3 Function
STATUS 3 [7:0]
0
1
2
3
4
Bit Name
INST_HLOCK
GEMD
SD_OP_50HZ
CVBS
FREE_RUN_ACT
Description
Horizontal lock indicator (instantaneous).
Gemstar detect.
Flags whether 50 Hz or 60 Hz is present at output.
Indicates if a CVBS signal is detected in ‘YC/CVBS autodetection’ configuration
Indicates if the ADV7188 is in free run mode. Outputs a blue screen by default. See the
DEF_VAL_AUTO_EN Default Value Automatic Enable, Address 0x0C [1] bit for details about
disabling this function.
Field length is correct for currently selected video standard.
Interlaced video detected (field sequence found).
Reliable sequence of swinging bursts detected.
5
6
7
STD_FLD_LEN
INTERLACED
PAL_SW_LOCK