參數資料
型號： ADUC7061BCPZ32-RL
廠商： Analog Devices Inc
文件頁數： 68/108頁
文件大?。?/td> 0K
描述： IC MCU 16/32BIT 32KB 32LFCSP
產品變化通告： ADuC7060/1 Idd Specification Change 01/Feb/2010
設計資源： USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075)
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
標準包裝： 5,000
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 10MHz
連通性： I²C，SPI，UART/USART
外圍設備： POR，PWM，溫度傳感器，WDT
輸入/輸出數： 8
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 1K x 32
電壓 - 電源 (Vcc/Vdd)： 2.375 V ~ 2.625 V
數據轉換器： A/D 5x24b，8x24b，D/A 1x14b
振蕩器型： 內部
工作溫度： -40°C ~ 125°C
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7060/ADuC7061
Data Sheet
Rev. D | Page 62 of 108
Table 68. IRQVEC MMR Bit Designations
Bit
Access
Initial
Value
Description
31:23
Read
only
0
Always read as 0.
22:7
Read
only
0
IRQBASE register value.
6:2
Read
only
0
Highest priority IRQ source. This
is a value between 0 to 19 repre-
senting the possible interrupt
sources. For example, if the highest
currently active IRQ is Timer1, then
these bits are [01000].
1:0
Reserved
0
Reserved bits.
Priority Registers
The interrupt priority registers, IRQP0, IRQP1, and IRQP2,
allow each interrupt source to have its priority level configured
for a level between 0 and 7. Level 0 is the highest priority level.
IRQP0 Register
Name:
IRQP0
Address:
0xFFFF0020
Default value: 0x00000000
Access:
Read and write
Table 69. IRQP0 MMR Bit Designations
Bit
Name
Description
31:27
Reserved
Reserved bits.
26:24
T3PI
A priority level of 0 to 7 can be set for
Timer3.
23
Reserved
Reserved bit.
22:20
T2PI
A priority level of 0 to 7 can be set for
Timer2.
19
Reserved
Reserved bit.
18:16
T1PI
A priority level of 0 to 7 can be set for
Timer1.
15
Reserved
Reserved bit.
14:12
T0PI
A priority level of 0 to 7 can be set for
Timer0.
11:7
Reserved
Reserved bits.
6:4
SWINTP
A priority level of 0 to 7 can be set for the
software interrupt source.
3:0
Reserved
Interrupt 0 cannot be prioritized.
IRQP1 Register
Name:
IRQP1
Address:
0xFFFF0024
Default value: 0x00000000
Access:
Read and write
Table 70. IRQP1 MMR Bit Designations
Bit
Name
Description
31
Reserved
Reserved bit.
30:28
I2CMPI
A priority level of 0 to 7 can be set for I2C
master.
27
Reserved
Reserved bit.
26:24
IRQ1PI
A priority level of 0 to 7 can be set for IRQ1.
23
Reserved
Reserved bit.
22:20
IRQ0PI
A priority level of 0 to 7 can be set for IRQ0.
19
Reserved
Reserved bit.
18:16
SPIMPI
A priority level of 0 to 7 can be set for SPI
master.
15
Reserved
Reserved bit.
14:12
UARTPI
A priority level of 0 to 7 can be set for UART.
11
Reserved
Reserved bit.
10:8
ADCPI
A priority level of 0 to 7 can be set for the
ADC interrupt source.
7:0
Reserved
Reserved bits.
IRQP2 Register
Name:
IRQP2
Address:
0xFFFF0028
Default value: 0x00000000
Access:
Read and write
Table 71. IRQP2 MMR Bit Designations
Bit
Name
Description
31:15
Reserved
Reserved bit.
14:12
IRQ3PI
A priority level of 0 to 7 can be set for IRQ3.
11
Reserved
Reserved bit.
10:8
IRQ2PI
A priority level of 0 to 7 can be set for IRQ2.
7
Reserved
Reserved bit.
6:4
SPISPI
A priority level of 0 to 7 can be set for SPI
slave.
3
Reserved
Reserved bit.
2:0
I2CSPI
A priority level of 0 to 7 can be set for I2C
slave.
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