Table 24. I2C Base Address = 0xFFF" />
參數(shù)資料
型號： ADUC7061BCPZ32-RL
廠商： Analog Devices Inc
文件頁數(shù)： 34/108頁
文件大?。?/td> 0K
描述： IC MCU 16/32BIT 32KB 32LFCSP
產(chǎn)品變化通告： ADuC7060/1 Idd Specification Change 01/Feb/2010
設計資源： USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075)
4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
標準包裝： 5,000
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 10MHz
連通性： I²C，SPI，UART/USART
外圍設備： POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 8
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 1K x 32
電壓 - 電源 (Vcc/Vdd)： 2.375 V ~ 2.625 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 5x24b，8x24b，D/A 1x14b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 125°C
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
Data Sheet
ADuC7060/ADuC7061
Rev. D | Page 31 of 108
Table 24. I2C Base Address = 0xFFFF0900
Address
Name
Bytes
Access Type
Default Value
Description
0x0900
I2CMCON
2
R/W
0x0000
I2C master control register.
0x0904
I2CMSTA
2
R
0x0000
I2C master status register.
0x0908
I2CMRX
1
R
0x00
I2C master receive register.
0x090C
I2CMTX
1
W
0x00
I2C master transmit register.
0x0910
I2CMCNT0
2
R/W
0x0000
I2C master read count register. Write the number of required bytes into
this register prior to reading from a slave device.
0x0914
I2CMCNT1
1
R
0x00
I2C master current read count register. This register contains the
number of bytes already received during a read from slave sequence.
0x0918
I2CADR0
1
R/W
0x00
Address byte register. Write the required slave address here prior to
communications.
0x091C
I2CADR1
1
R/W
0x00
Address byte register. Write the required slave address here prior to
communications. Only used in 10-bit mode.
0x0924
I2CDIV
2
R/W
0x1F1F
I2C clock control register. Used to configure the SCLK frequency.
0x0928
I2CSCON
2
R/W
0x0000
I2C slave control register.
0x092C
I2CSSTA
2
R/W
0x0000
I2C slave status register.
0x0930
I2CSRX
1
R
0x00
I2C slave receive register.
0x0934
I2CSTX
1
W
0x00
I2C slave transmit register.
0x0938
I2CALT
1
R/W
0x00
I2C hardware general call recognition register.
0x093C
I2CID0
1
R/W
0x00
I2C Slave ID0 register. Slave bus ID register.
0x0940
I2CID1
1
R/W
0x00
I2C Slave ID1 register. Slave bus ID register.
0x0944
I2CID2
1
R/W
0x00
I2C Slave ID2 register. Slave bus ID register.
0x0948
I2CID3
1
R/W
0x00
I2C Slave ID3 register. Slave bus ID register.
0x094C
I2CFSTA
2
R/W
0x0000
I2C FIFO status register. Used in both master and slave modes.
Table 25. SPI Base Address = 0xFFFF0A00
Address
Name
Bytes
Access
Type
Default Value
Description
0x0A00
SPISTA
4
R
0x00000000
SPI status MMR.
0x0A04
SPIRX
1
R
0x00
SPI receive MMR.
0x0A08
SPITX
1
W
0x00
SPI transmit MMR.
0x0A0C
SPIDIV
1
W
0x1B
SPI baud rate select MMR.
0x0A10
SPICON
2
R/W
0x0000
SPI control MMR.
Table 26. GPIO Base Address = 0xFFFF0D00
Address
Name
Bytes
Access
Type
Default Value
Description
0x0D00
GP0CON0
4
R/W
0x00000000
GPIO Port 0 control MMR.
0x0D04
GP1CON
4
R/W
0x00000000
GPIO Port 1 control MMR.
0x0D08
GP2CON
4
R/W
0x00000000
GPIO Port 2 control MMR.
0x0D20
GP0DAT
4
R/W
0x000000XX
GPIO Port 0 data control MMR.
0x0D24
GP0SET
4
W
0x000000XX
GPIO Port 0 data set MMR.
0x0D28
GP0CLR
4
W
0x000000XX
GPIO Port 0 data clear MMR.
0x0D2C
GP0PAR
4
R/W
0x00000000
GPIO Port 0 pull-up disable MMR.
0x0D30
GP1DAT
4
R/W
0x000000XX
GPIO Port 1 data control MMR.
0x0D34
GP1SET
4
W
0x000000XX
GPIO Port 1 data set MMR.
0x0D38
GP1CLR
4
W
0x000000XX
GPIO Port 1 data clear MMR.
0x0D3C
GP1PAR
4
R/W
0x00000000
GPIO Port 1 pull-up disable MMR.
0x0D40
GP2DAT
4
R/W
0x000000XX
GPIO Port 2 data control MMR.
0x0D44
GP2SET
4
W
0x000000XX
GPIO Port 2 data set MMR.
0x0D48
GP2CLR
4
W
0x000000XX
GPIO Port 2 data clear MMR.
0x0D4C
GP2PAR
4
R/W
0x00000000
GPIO Port 2 pull-up disable MMR.
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