參數(shù)資料
型號(hào)： ADSP-21267
廠商： Analog Devices, Inc.
英文描述： Preliminary Technical Data
中文描述： 初步技術(shù)數(shù)據(jù)
文件頁(yè)數(shù)： 18/44頁(yè)
文件大?。?/td> 454K
代理商： ADSP-21267
Rev. PrA
|
Page 18 of 44
|
January 2004
ADSP-21267
PRELIMINARY TECHNICAL DATA
Clock Input
Clock Signals
The ADSP-21267 can use an external clock or a crystal. See
CLKIN pin description. The programmer can configure the
ADSP-21267 to use its internal clock generator by connecting
the necessary components to CLKIN and XTAL.
Figure 8
shows
the component connections used for a crystal operating in fun-
Reset
Table 9. Clock Input
Parameter
150 MHz
Min
200 MHz
Min
Unit
Max
Max
Timing Requirements
t
CK
t
CKL
t
CKH
t
CKRF
t
CCLK
CLKIN Period
CLKIN Width Low
CLKIN Width High
CLKIN Rise/Fall (0.4V-2.0V)
CCLK Period
3
20
1
7.5
1
7.5
1
160
2
80
2
80
2
3
10
15
1
6
1
6
1
5
160
2
80
2
80
2
3
10
ns
ns
ns
ns
ns
6.66
1
Applies only for CLKCFG1-0 = 00 and default values for PLL control bits in PMCTL.
2
Applies only for CLKCFG1-0 = 01 and default values for PLL control bits in PMCTL.
3
Any changes to PLL control bits in the PMCTL register must meet core clock timing specification t
CCLK
.
Figure 7. Clock Input
CLKIN
t
CK
t
CKH
t
CKL
Figure 8. 150 MHz or 200 MHz Operation (Fundamental Mode Crystal)
CLKIN
XTAL
C1
C2
X1
NOTE: C1 AND C2 ARE SPECIFIC TO CRYSTAL SPECIFIED FOR X1.
CONTACT CRYSTAL MANUFACTURER FOR DETAILS. CRYSTAL
SELECTION MUST COMPLY WITH CLKCFG1-0 = 10 OR = 01.
1M
Table 10. Reset
Parameter
Timing Requirements
t
WRST
t
SRST
Min
4t
CK
8
Max
Unit
ns
ns
RESET Pulse Width Low
1
RESET Setup Before CLKIN Low
1
Applies after the power-up sequence is complete. At power-up, the processor's internal phase-locked loop requires no more than 100
μ
s while RESET is low, assuming
stable VDD and CLKIN (not including start-up time of external clock oscillator).
Figure 9. Reset
CLKIN
RESET
t
WRST
t
SRST
相關(guān)PDF資料
PDF描述
ADSP-21267SKBCZ-X Preliminary Technical Data
ADSP-21267SKSTZ-X Preliminary Technical Data
ADSP-21362 SHARC Processor
ADSP-21362BBC-1AA SHARC Processor
ADSP-21362BBCZ-1AA SHARC Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21267SKBCZ-X 制造商:AD 制造商全稱:Analog Devices 功能描述:Preliminary Technical Data
ADSP-21267SKSTZ-X 制造商:AD 制造商全稱:Analog Devices 功能描述:Preliminary Technical Data
ADSP-21362 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor
adsp-21362bbc-1aa 制造商:Analog Devices 功能描述:
ADSP-21362BBCZ-1AA 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 333 MHz Processor includes DTCP/SPDIF RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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