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HARDWARE
1-14
7540 Group User
’
s Manual
[CPU mode register] CPUM
The CPU mode register contains the stack page selection bit.
This register is allocated at address 003B16.
Switching method of CPU mode register
Switch the CPU mode register (CPUM) at the head of program af-
ter releasing Reset in the following method.
Fig. 12 Switching method of CPU mode register
Fig. 11 Structure of CPU mode register
Oscillation mode selection bit (Note 1)
0 : Ceramic oscillation
CPU mode register
(CPUM: address 003B
16
, initial value: 80
16
)
Stack page selection bit
0 : 0 page
1 : 1 page
Clock division ratio selection bits
b7 b6
0 0 : f(
φ
) = f(X
IN
)/2 (High-speed mode)
0 1 : f(
φ
) = f(X
IN
)/8 (Middle-speed mode)
1 0 : applied from ring oscillator
1 1 : f(
) = f(X
IN
) (Double-speed mode)(Note 2)
Ring oscillator oscillation control bit
IN
oscillation control bit
X
Processor mode bits (Note 1)
b1 b0
0 0 SNot available
b7 b0
2:
These bits are used only when a ceramic oscillation is selected.
Do not use these when an RC oscillation is selected.
Note 1:
The bit can be rewritten only once after releasing reset. After rewriting
it is disable to write any data to the bit. However, by reset the bit is
initialized and can be rewritten, again.
(It is not disable to write any data to the bit for emulator MCU
“
M37540RSS
”
.)
After releasing reset
Switch the oscillation mode
selection bit (bit 5 of CPUM)
Switch the clock division ratio
selection bits (bits 6 and 7 of CPUM)
Main routine
Start with a built-in ring oscillator
An initial value is set as a ceramic
oscillation mode. When it is switched to an
RC oscillation, its oscillation starts.
Select 1/1, 1/2, 1/8 or ring oscillator.
Wait by ring oscillator operation until
establishment of oscillator clock
When using a ceramic oscillation, wait until
establlishment of oscillation from oscillation starts.
When using an RC oscillation, wait time is not
required basically (time to execute the instruction to
switch from a ring oscillator meets the requirement).
FUNCTIONAL DESCRIPTION