
APPENDIX
3.1 Electrical characteristics
7540 Group User
’
s Manual
3-20
Fig. 3.1.3
Switching characteristics measurement
circuit diagram (Extended operating
temperature)
/ / /
Measured
output pin
CMOS output
100 pF
(6) Switching Characteristics (Extended operating temperature version)
Table 3.1.21 Switching characteristics (1)
(V
CC
= 4.0 to 5.5 V, V
SS
= 0 V, Ta = –40 to 85 °C, unless otherwise noted)
t
C
(S
CLK1
)/2
–
30
t
C
(S
CLK1
)/2
–
30
–
30
t
C
(S
CLK2
)/2
–
30
t
C
(S
CLK2
)/2
–
30
0
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
t
WH
(S
CLK1
)
t
WL
(S
CLK1
)
t
d
(S
CLK1
–
TxD
1
)
t
v
(S
CLK1
–
TxD
1
)
t
r
(S
CLK1
)
t
f
(S
CLK1
)
t
WH
(S
CLK2
)
t
WL
(S
CLK2
)
t
d
(S
CLK2
–
S
DATA2
)
t
v
(S
CLK2
–
S
DATA2
)
t
r
(S
CLK2
)
t
f
(S
CLK2
)
t
r
(CMOS)
t
f
(CMOS)
Serial I/O1 clock output
“
H
”
pulse width
Serial I/O1 clock output
“
L
”
pulse width
Serial I/O1 output delay time
Serial I/O1 output valid time
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output
“
H
”
pulse width
Serial I/O2 clock output
“
L
”
pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output rising time
Serial I/O2 clock output falling time
CMOS output rising time (Note 1)
CMOS output falling time (Note 1)
Note 1:
Pin X
OUT
is excluded.
Table 3.1.22 Switching characteristics (2)
(V
CC
= 2.4 to 5.5 V, V
SS
= 0 V, Ta = –40 to 85 °C, unless otherwise noted)
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
350
50
50
350
50
50
50
50
Note 1:
Pin X
OUT
is excluded.
t
WH
(S
CLK1
)
t
WL
(S
CLK1
)
t
d
(S
CLK1
–
T
x
D
1
)
t
v
(S
CLK1
–
T
x
D
1
)
t
r
(S
CLK1
)
t
f
(S
CLK1
)
t
WH
(S
CLK2
)
t
WL
(S
CLK2
)
t
d
(S
CLK2
–
S
DATA2
)
t
v
(S
CLK2
–
S
DATA2
)
t
r
(S
CLK2
)
t
f
(S
CLK2
)
t
r
(CMOS)
t
f
(CMOS)
Serial I/O1 clock output
“
H
”
pulse width
Serial I/O1 clock output
“
L
”
pulse width
Serial I/O1 output delay time
Serial I/O1 output valid time
Serial I/O1 clock output rising time
Serial I/O1 clock output falling time
Serial I/O2 clock output
“
H
”
pulse width
Serial I/O2 clock output
“
L
”
pulse width
Serial I/O2 output delay time
Serial I/O2 output valid time
Serial I/O2 clock output rising time
Serial I/O2 clock output falling time
CMOS output rising time (Note 1)
CMOS output falling time (Note 1)
t
C
(S
CLK1
)/2
–
50
t
C
(S
CLK1
)/2
–
50
–
30
t
C
(S
CLK2
)/2
–
50
t
C
(S
CLK2
)/2
–
50
0
20
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
10
10
140
30
30
140
30
30
30
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns