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7540 Group User
’
s Manual
2-140
APPLICATION
2.9 Oscillation control
(2) Setting method
Figure 2.9.7 shows the initial setting method oscillation stop detection circuit.
Figure 2.9.8 shows the setting method for the oscillation stop detection circuit in the main processing.
Fig. 2.9.7 Initial setting method for the oscillation stop detection circuit
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Process 2: Select oscillation mode.
b7
b0
MISRG (MISRG) [Address 38
16
]
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Oscillation stop is detected
Some error occus in the oscillation circuit.
Do not switch the operation clock and execute the processing when some error occurs.
Oscillation stop is not detected
Execute the Process 2.
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CPU mode register (CPUM) [Address 3B
16
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Process 4: Set the ceramic or RC oscillation stop detection function active bit.
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16
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Process 5: Select clock division ratio.
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CPU mode register (CPUM) [Address 3B
16
]
Clock division ratio selection bits
b7b6
0 0: f(
φ
) = f(X
IN
)/2 (high-speed mode)
0 1: f(
φ
)= f(X
IN
)/8 (middle-speed mode)
1 0: Applied from ring oscillator
1 1: f(
φ
)=f(X
IN
) (double-speed mode) (
Note
)
Note:
These bits are used only when a ceramic oscillation is selected.
Do not use these when an RC oscillation is selected.
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