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參數(shù)資料
| 型號(hào)： | 6PAIC3106IRGZRQ1 |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 48/103頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC AUDIO CODEC STEREO 48-QFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 立體聲音頻 |
| 數(shù)據(jù)接口： | 串行 |
| 分辨率（位）： | 24 b |
| ADC / DAC 數(shù)量： | 2 / 2 |
| 三角積分調(diào)變： | 是 |
| S/N 比，標(biāo)準(zhǔn) ADC / DAC (db)： | 92 / 102（差分），92 / 95（單端） |
| 動(dòng)態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db)： | 91 / 99（差分），91 / 92（單端） |
| 電壓 - 電源，模擬： | 2.7 V ~ 3.6 V |
| 電壓 - 電源，數(shù)字： | 1.1 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-VQFN 裸露焊盤（7x7） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 產(chǎn)品目錄頁(yè)面： | 1077 (CN2011-ZH PDF) |
| 其它名稱： | 296-25253-6 |
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To Detection block
HPLOUT
HPLCOM
HPROUT
HPRCOM
MICDET
This switch closes when
jack is removed
SLAS663B – AUGUST 2009 – REVISED OCTOBER 2012
Figure 39. Configuration of Device for Jack Detection Using a Fully Differential Stereo Headphone
Output Connection
GENERAL-PURPOSE I/O
TLV320AIC3106 has two dedicated pins for general-purpose I/O. These pins can be used to read status of
external signals through register read when configured as general-purpose input. When configured as general-
purpose output , these pins can also drive logic high or low. Besides these standard GPIO functions, these pins
can also be used in a variety of ways, such as output for internal clocks and interrupt signals. The
TLV320AIC3106 generates a variety of interrupts of use to the host processor such interrupts on jack detection,
button press, short-circuit detection, and AGC noise detection. All these interrupts can be routed individually to
the GPIO pins or can be combined by a logical OR. In case of a combined interrupt, the user can read an
internal status register to find the actual cause of interrupt. When configured as interrupt, the TLV320AIC3106
also offers the flexibility of generating a single pulse or a train of pulses until the interrupt status register is read
by the user.
CONTROL REGISTERS
The control registers for the TLV320AIC3106 are described in detail below. All registers are 8 bit in width, with
D7 referring to the most significant bit of each register, and D0 referring to the least significant bit.
Table 8. Page 0 / Register 0: Page Select Register
READ/
RESET
BIT(1)
DESCRIPTION
WRITE
VALUE
D7–D1
X
0000 000
Reserved, write only zeros to these register bits
D0
R/W
0
Page Select Bit
Writing zero to this bit sets Page-0 as the active page for following register accesses. Writing a one to this
bit sets Page-1 as the active page for following register accesses. It is recommended that the user read
this register bit back after each write, to ensure that the proper page is being accessed for future register
read/writes.
(1)
When resetting registers related to routing and volume controls of output drivers, it is recommended to reset them by writing directly to
the registers instead of using software reset.
Copyright 2009–2012, Texas Instruments Incorporated
49
Product Folder Links: TLV320AIC3106-Q1
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