參數(shù)資料
型號: 6PAIC3106IRGZRQ1
廠商: Texas Instruments
文件頁數(shù): 18/103頁
文件大?。?/td> 0K
描述: IC AUDIO CODEC STEREO 48-QFN
標(biāo)準(zhǔn)包裝: 1
類型: 立體聲音頻
數(shù)據(jù)接口: 串行
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標(biāo)準(zhǔn) ADC / DAC (db): 92 / 102(差分),92 / 95(單端)
動態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 91 / 99(差分),91 / 92(單端)
電壓 - 電源,模擬: 2.7 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.1 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-VQFN 裸露焊盤(7x7)
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁面: 1077 (CN2011-ZH PDF)
其它名稱: 296-25253-6
SDA
SCL
t
HD-STA
0.9
s
m
t
SU-STO
0.9
s
m
P
S
t
SU-STA
0.9
s
m
Sr
t
HD-STA
0.9
s
m
S
T0114-02
SLAS663B – AUGUST 2009 – REVISED OCTOBER 2012
Figure 16. I2C Interface Timing
I2C is a two-wire, open-drain interface supporting multiple devices and masters on a single bus. Devices on the
I2C bus only drive the bus lines LOW by connecting them to ground; they never drive the bus lines HIGH.
Instead, the bus wires are pulled HIGH by pull-up resistors, so the bus wires are HIGH when no device is driving
them LOW. This way, two devices cannot conflict; if two devices drive the bus simultaneously, there is no driver
contention.
Communication on the I2C bus always takes place between two devices, one acting as the master and the other
acting as the slave. Both masters and slaves can read and write, but slaves can only do so under the direction of
the master. Some I2C devices can act as masters or slaves, but the TLV320AIC3106 can only act as a slave
device.
An I2C bus consists of two lines, SDA and SCL. SDA carries data; SCL provides the clock. All data is transmitted
across the I2C bus in groups of eight bits. To send a bit on the I2C bus, the SDA line is driven to the appropriate
level while SCL is LOW (a LOW on SDA indicates the bit is zero; a HIGH indicates the bit is one). Once the SDA
line has settled, the SCL line is brought HIGH, then LOW. This pulse on SCL clocks the SDA bit into the
receivers shift register.
The I2C bus is bidirectional: the SDA line is used both for transmitting and receiving data. When a master reads
from a slave, the slave drives the data line; when a master sends to a slave, the master drives the data line.
Under normal circumstances the master drives the clock line.
Most of the time the bus is idle, no communication is taking place, and both lines are HIGH. When
communication is taking place, the bus is active. Only master devices can start a communication. They do this by
causing a START condition on the bus. Normally, the data line is only allowed to change state while the clock
line is LOW. If the data line changes state while the clock line is HIGH, it is either a START condition or its
counterpart, a STOP condition. A START condition is when the clock line is HIGH and the data line goes from
HIGH to LOW. A STOP condition is when the clock line is HIGH and the data line goes from LOW to HIGH.
After the master issues a START condition, it sends a byte that indicates which slave device it wants to
communicate with. This byte is called the address byte. Each device on an I2C bus has a unique 7-bit address to
which it responds. (Slaves can also have 10-bit addresses; see the I2C specification for details.) The master
sends an address in the address byte, together with a bit that indicates whether it wishes to read from or write to
the slave device.
Every byte transmitted on the I2C bus, whether it is address or data, is acknowledged with an acknowledge bit.
When a master has finished sending a byte (eight data bits) to a slave, it stops driving SDA and waits for the
slave to acknowledge the byte. The slave acknowledges the byte by pulling SDA LOW. The master then sends a
clock pulse to clock the acknowledge bit. Similarly, when a master has finished reading a byte, it pulls SDA LOW
to acknowledge this to the slave. It then sends a clock pulse to clock the bit.
Copyright 2009–2012, Texas Instruments Incorporated
21
Product Folder Links: TLV320AIC3106-Q1
相關(guān)PDF資料
PDF描述
70001851 DEVICE SERVER 1PORT SRL-ETHERNET
73M1822-IM/F MICRODAA VOICE DATA/FAX 42-QFN
73M1866B-IM/F MICRODAA SGL PCM HIGHWAY 42-QFN
73M2901CE-IGVR/F IC MODEM 3.3V V.22BIS 32-TQFP
73S1209F-68IMR/F/P IC SMART CARD READER PROG 68-QFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
6PAIC3109TRHBRQ1 功能描述:AUTOMOTIVE LOW-POWER 96KHZ MONO 制造商:texas instruments 系列:汽車級,AEC-Q100 包裝:剪切帶(CT) 零件狀態(tài):在售 類型:音頻 數(shù)據(jù)接口:I2C, I2S 分辨率(位):16 b,20 b,24 b,32 b ADC/DAC 數(shù):1 / 1 三角積分:是 信噪比,ADC/DAC(db)(典型值):92 / 102 動態(tài)范圍,ADC/DAC(db)(典型值):93 / 97 電壓 - 電源,模擬:2.7 V ~ 3.6 V 電壓 - 電源,數(shù)字:1.1 V ~ 3.6 V 工作溫度:-40°C ~ 105°C(TA) 安裝類型:表面貼裝 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商器件封裝:32-VQFN(5x5) 標(biāo)準(zhǔn)包裝:1
6PAIC3254IRHBRQ1 制造商:Texas Instruments 功能描述: 制造商:Texas Instruments 功能描述:IC STEREO AUDIO CODEC 1.8V 32QFN 制造商:Texas Instruments 功能描述:AUDIO CODEC, 32BIT, 192KSPS, VQFN-32, Audio CODEC Type:Stereo, No. of ADCs:2, No
6PA-J45 功能描述:開關(guān)配件 LIMT SWITCH -OT RoHS:否 制造商:C&K Components 類型:Cap 用于:Pushbutton Switches 設(shè)計目的:
6-PAK 制造商:CANDD 制造商全稱:C&D Technologies 功能描述:PROGRAMMABLE DC/DC CONVERTER
6PC-03 制造商:TE Connectivity 功能描述: