- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄293971 > 5962R0150201VYC 32-BIT, 12 MHz, RISC PROCESSOR, CPGA144 PDF資料下載
參數(shù)資料
| 型號： | 5962R0150201VYC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 12 MHz, RISC PROCESSOR, CPGA144 |
| 封裝： | CERAMIC, PGA-144 |
| 文件頁數(shù)： | 6/55頁 |
| 文件大小： | 685K |
| 代理商： | 5962R0150201VYC |
第1頁第2頁第3頁第4頁第5頁當前第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁
14
The advanced architecture of the UT1750AR allows the system
designer to define RISC macros accessible through the MIL-
STD-1750A Built-In Function (BIF) opcode. These user-
defined RISC macros can be any regularly-used function
requiring the UT1750AR’s high-speed, real-time processing
capabilities. The UT1750AR fetches the BIF instruction from
Operand memory just like any other 1750 instruction; it then
decodes the BIF. The resulting UT1750AR-generated RISC
address points to the location of the user-defined macro in RISC
memory. RISC macro execution proceeds just as it would for
any other 1750 instruction. MIL-STD-1750A permits the
system designer to define up to 256 BIF variations.
REGISTER ARCHITECTURE
The UT1750AR has a register-oriented architecture (figure 1).
The registers within the UT1750AR fall into two categories:
general purpose registers, and specialized registers. All the
UT1750AR’s registers are accessible to the programmer
through the RISC instruction set. The programmer uses data
from these registers to perform arithmetic and logical functions,
alter program flow, detect various system and processor faults,
determine processor status, provide control for UART and timer
functions, and provide interrupt processing and exception-
handling control.
General Purpose Registers
Figure 6 shows the UT1750AR’s 20 general purpose registers.
All RISC instructions use these registers; any register or register
pair can be either the source or the destination for any RISC
instruction. The UT1750AR normally accesses these registers
as single-word 16-bit registers although the UT1750AR can
concatenate these registers into 32-bit double-word register
pairs. When the programmer uses the general purpose registers
as a double-word register pair, the most significant 16 bits of
the 32-bit words are stored in the even-numbered register of the
register pair. For instance, if a 32-bit word is stored in Register
Pair XR6, the most significant word is stored in register R6 and
the least significant word is stored in register R7.
In addition to the 20 general purpose registers, the UT1750AR
has a 32-bit Accumulator (ACC). The ACC is normally a
destination register, although under certain circumstances it can
be the source register. The Accumulator retains the most
significant half of the product during a multiply instruction or
the remainder during a divide operation.
Specialized Registers
The UT1750AR has 16 special purpose registers (figures 7
through 24). The values in the brackets indicate the power-up
condition. They are:
1. Stack Pointer Register (SP) [XXXX16]
2. System Status Register (STATUS)
3. UART Receiver Buffer Register (RCVR)
[XX0016]
4. UART Transmitter Buffer Register (TXMT)
[XX0016]
5. Pending Interrupt Register (PI) [000016]
6. Fault Register (FT) [000016]
7. Interrupt Mask Register (MK) [XXXX16]
8. 1750 Status Register (SW) [000016]
9. RISC Instruction Counter Register (IC)
[0000016]
10.
RISC Instruction Counter Save Register (ICS)
[XXXXX16]
11.
RISC Instruction Register (IR) [000016]
12.
1750 Pipeline Register (PIPE) [XXXX16]
13.
1750 Program Register (PR) [XXXX16]
14.
1750 Program Counter (PC) [XXXX16]
15.
1750 Timer A Register (TA) [000016]
16.
1750 Timer B Register (TB) [000016]
The RISC instruction set provides access to most of the special
purpose registers.
The Stack Pointer Register
Figure 7. The UT1750AR uses the 16-bit Stack Pointer Register
as an address pointer on Push and
Figure 6. General Register Set
CONCATENATED 32-BIT
ACC
XR18
XR16
XR14
XR12
XR10
XR8
XR6
XR4
XR2
XR0
R19
R17
R15
R13
R11
R9
R7
R5
R3
R1
ACCUMULATOR
R6
R18
R16
R14
R12
R10
R8
R4
R2
R0
REGISTER PAIR
16 BITS
15 14 13 12 11 10 9
8
7
5
4
3 2
1 0
S
P
1
5
S
P
1
4
S
P
1
3
S
P
1
2
S
P
1
S
P
1
0
S
P
9
S
P
8
6
S
P
6
S
P
7
S
P
5
S
P
4
S
P
3
S
P
2
S
P
1
S
P
0
MSB
LSB
Figure 7. The Stack Pointer Register (SP)
相關PDF資料 |
PDF描述 |
|---|---|
| 5962R0150202VYX | 16-BIT, 16 MHz, RISC PROCESSOR, QFP132 |
| 5962R0722402VYC | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP256 |
| 5962R8958702VXA | 5 V FIXED POSITIVE LDO REGULATOR, 1 V DROPOUT, CDSO16 |
| 5962R9215311VTA | 32K X 8 STANDARD SRAM, 55 ns, CDFP36 |
| 5962R9215311VTX | 32K X 8 STANDARD SRAM, 55 ns, CDFP36 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 5962R0253801VZA | 制造商:Analog Devices 功能描述:- Rail/Tube |
| 5962R0720802VXC | 制造商:Texas Instruments 功能描述:ADS5463 RHA QMLV DEVICE |
| 5962R0722601VZA | 制造商:Texas Instruments 功能描述:D/A CONVERTER, 12-BIT - Trays |
| 5962R0722701VZA | 功能描述:模數(shù)轉換器 - ADC 8-Ch 50 kSPS-1 MSPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| 5962R0722902VXA | 功能描述:低壓差穩(wěn)壓器 - LDO 3-Terminal Adj Reg RoHS:否 制造商:Texas Instruments 最大輸入電壓:36 V 輸出電壓:1.4 V to 20.5 V 回動電壓（最大值）:307 mV 輸出電流:1 A 負載調節(jié):0.3 % 輸出端數(shù)量: 輸出類型:Fixed 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-20 |
發(fā)布緊急采購，3分鐘左右您將得到回復。