參數(shù)資料
型號(hào)： 5962R0150201VYC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 12 MHz, RISC PROCESSOR, CPGA144
封裝： CERAMIC, PGA-144
文件頁數(shù)： 1/55頁
文件大?。?/td> 685K
代理商： 5962R0150201VYC
Standard Products
UT1750AR RadHard RISC Microprocessor
Data Sheet
May 2003
FEATURES
q Operates in either RISC (Reduced Instruction Set
Computer) mode or MIL-STD-1750A mode
q Supports MIL-STD-1750A 32-bit floating-point
operations and 48-bit extended-precision floating-point
operations on chip
q Built-in 9600 baud UART
q Supports defined MIL-STD-1750A Console Mode of Operation
q Full 64K-word address space. Expandable to 1M words with
optional MMU (operand port)
q Register-oriented architecture has 21 user-accessible registers
q Registers may be in 16-bit word or 32-bit double-word
configurations
q Built-in multiprocessor bus arbitration and Direct Memory Access
support (DMA)
q TTL-compatible I/O
q Stable 1.5-micron CMOS technology
q Full military operating range, -55
°C to +125°C, in accordance
with MIL-PRF-38535 for Class Q and V
q Typical radiation performance
- Total dose: 1.0E6 rads(Si)
- SEL Immune . 100 MeV-cm
2/mg
- LETTH(0.25) = 60 MeV-cm
2/mg
- Saturated Cross Section (cm
2) per bit, 1.2E-7
- 2.3E-11 errors/bit-day, Adams to 90% geosynchronous heavy ion
q Standard Military Drawing 5962-01502
PROCES-
SOR
STATUS
Figure 1. UT1750AR Functional Block Diagram
OE
WE
BRQ
BGNT
BUSY
BGACK
NUI1
NUI2
M1750
STATE1
MME
CONSOLE
RISC DATA
RISC
ADDRESS
SYSFL
BTERR
MPAR
MPROT
PFAIL
IOLINT1
IOLINT0
INT0-5
MRST
16
RISC
ADD
MUX
RISC
MEMORY
CONTROL
BUS
ARBITRA-
TION
PROCESSOR
CONTROL
LOGIC
OSCILLATOR
/CLOCK
GENERAL
PURPOSE
REGISTERS
OSCIN
OSCOUT
SYSCLK
IR
IC/ICs
ACC
SHIFT REG
TEMP DEST
16
TEMP SRC
BIT REG
A MUX
B MUX
32-BIT ALU
16
ADDR
MUX
BUS
CONTROL
UART
TBR
RBR
TIMCLK
TEST
UARTOUT
UARTIN
TR
TB
IM
FR
PI
ST
SW
16
8
AS0-3
OPERAND
DATA
DTACK
M/IO
R/WR
DS
OPERAND
ADDRESS
I/O
MUX
16
6
32
NUO3
PIPELINE
PR
OP/IN
AS
1750 PC
32
1750 SP
RISC MAP
4
PS0-3
16
I
N
T
E
R
U
P
T
S
16
RISC
ADDRESS
or O/P DISC
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